]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: 8690/1: lpae: build TTB control register value from scratch in v7_ttb_setup
authorHoeun Ryu <hoeun.ryu@gmail.com>
Mon, 7 Aug 2017 05:49:19 +0000 (06:49 +0100)
committerRussell King <rmk+kernel@armlinux.org.uk>
Tue, 29 Aug 2017 12:09:12 +0000 (13:09 +0100)
Reading TTBCR in early boot stage might return the value of the previous
kernel's configuration, especially in case of kexec. For example, if
normal kernel (first kernel) had run on a configuration of PHYS_OFFSET <=
PAGE_OFFSET and crash kernel (second kernel) is running on a configuration
PHYS_OFFSET > PAGE_OFFSET, which can happen because it depends on the
reserved area for crash kernel, reading TTBCR and using the value to OR
other bit fields might be risky because it doesn't have a reset value for TTBCR.

Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Hoeun Ryu <hoeun.ryu@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
arch/arm/mm/proc-v7-3level.S

index 5e5720e8bc5f219ebaa138eae369c32cba5b1615..7d16bbc4102bd22569062a50444901a879af2203 100644 (file)
@@ -129,8 +129,7 @@ ENDPROC(cpu_v7_set_pte_ext)
        .macro  v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp
        ldr     \tmp, =swapper_pg_dir           @ swapper_pg_dir virtual address
        cmp     \ttbr1, \tmp, lsr #12           @ PHYS_OFFSET > PAGE_OFFSET?
-       mrc     p15, 0, \tmp, c2, c0, 2         @ TTB control egister
-       orr     \tmp, \tmp, #TTB_EAE
+       mov     \tmp, #TTB_EAE                  @ for TTB control egister
        ALT_SMP(orr     \tmp, \tmp, #TTB_FLAGS_SMP)
        ALT_UP(orr      \tmp, \tmp, #TTB_FLAGS_UP)
        ALT_SMP(orr     \tmp, \tmp, #TTB_FLAGS_SMP << 16)