]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: imx53-qsb: Use DRM bindings for the Seiko 43WVF1G panel
authorFabio Estevam <festevam@gmail.com>
Thu, 24 Oct 2019 21:57:12 +0000 (18:57 -0300)
committerShawn Guo <shawnguo@kernel.org>
Mon, 28 Oct 2019 11:54:17 +0000 (19:54 +0800)
Currently the parallel panel that is supported is the CLAA WVGA panel,
which is the one that comes with the i.MX51 Babbage board.

The default parallel panel that goes with the imx53-qsb board is
the Seiko 43WVF1G LCD, so switch to the Seiko one.

While at it convert to DRM bindings.

The parallel display still remains disabled as the default display
port is the TVE output.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx53-qsb-common.dtsi

index f00dda334976abf53e37b367ab76938bdc06de4c..9b4efcd82636d354c59825386b723ca6f76326c0 100644 (file)
@@ -18,34 +18,28 @@ memory@70000000 {
 
        display0: disp0 {
                compatible = "fsl,imx-parallel-display";
-               interface-pix-fmt = "rgb565";
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_ipu_disp0>;
+
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
-               display-timings {
-                       claawvga {
-                               native-mode;
-                               clock-frequency = <27000000>;
-                               hactive = <800>;
-                               vactive = <480>;
-                               hback-porch = <40>;
-                               hfront-porch = <60>;
-                               vback-porch = <10>;
-                               vfront-porch = <10>;
-                               hsync-len = <20>;
-                               vsync-len = <10>;
-                               hsync-active = <0>;
-                               vsync-active = <0>;
-                               de-active = <1>;
-                               pixelclk-active = <0>;
-                       };
-               };
 
-               port {
+               port@0 {
+                       reg = <0>;
+
                        display0_in: endpoint {
                                remote-endpoint = <&ipu_di0_disp0>;
                        };
                };
+
+               port@1 {
+                       reg = <1>;
+
+                       display_out: endpoint {
+                               remote-endpoint = <&panel_in>;
+                       };
+               };
        };
 
        gpio-keys {
@@ -84,6 +78,16 @@ user {
                };
        };
 
+       panel {
+               compatible = "sii,43wvf1g";
+
+               port {
+                       panel_in: endpoint {
+                               remote-endpoint = <&display_out>;
+                       };
+               };
+       };
+
        regulators {
                compatible = "simple-bus";
                #address-cells = <1>;