drm/amdgpu: move validation of the VM size into the VM code

This moves validation of the VM size parameter into amdgpu_vm_adjust_size().

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 748ecd74726d7ba1e44a7ea298b7edc74abef9ef..cd74beb431c4813c0354035b0f515e1ad6fd0ca5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1187,22 +1187,8 @@ static void amdgpu_check_vm_size(struct amdgpu_device *adev)
        if (amdgpu_vm_size < 1) {
                dev_warn(adev->dev, "VM size (%d) too small, min is 1GB\n",
                         amdgpu_vm_size);
-               goto def_value;
+               amdgpu_vm_size = -1;
        }
-
-       /*
-        * Max GPUVM size for Cayman, SI, CI VI are 40 bits.
-        */
-       if (amdgpu_vm_size > 1024) {
-               dev_warn(adev->dev, "VM size (%d) too large, max is 1TB\n",
-                        amdgpu_vm_size);
-               goto def_value;
-       }
-
-       return;
-
-def_value:
-       amdgpu_vm_size = -1;
 }
 
 /**

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 82a6f6c86aaf992bf3af0608f1ade5bb8a8099ca..44430c4820ccbe8bb7a73bd2b6e46f11f1fcebd2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2580,13 +2580,22 @@ static uint32_t amdgpu_vm_get_block_size(uint64_t vm_size)
  * @vm_size: the default vm size if it's set auto
  */
 void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t vm_size,
-                          uint32_t fragment_size_default, unsigned max_level)
+                          uint32_t fragment_size_default, unsigned max_level,
+                          unsigned max_bits)
 {
        uint64_t tmp;
 
        /* adjust vm size first */
-       if (amdgpu_vm_size != -1)
+       if (amdgpu_vm_size != -1) {
+               unsigned max_size = 1 << (max_bits - 30);
+
                vm_size = amdgpu_vm_size;
+               if (vm_size > max_size) {
+                       dev_warn(adev->dev, "VM size (%d) too large, max is %u GB\n",
+                                amdgpu_vm_size, max_size);
+                       vm_size = max_size;
+               }
+       }
 
        adev->vm_manager.max_pfn = (uint64_t)vm_size << 18;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 54e540d5e8d7d85068040b8d453ee3212934ac19..43ea131dd411b8626816e7df608e203a5b929fe2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -325,7 +325,8 @@ struct amdgpu_bo_va_mapping *amdgpu_vm_bo_lookup_mapping(struct amdgpu_vm *vm,
 void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
                      struct amdgpu_bo_va *bo_va);
 void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t vm_size,
-                          uint32_t fragment_size_default, unsigned max_level);
+                          uint32_t fragment_size_default, unsigned max_level,
+                          unsigned max_bits);
 int amdgpu_vm_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
 bool amdgpu_vm_need_pipeline_sync(struct amdgpu_ring *ring,
                                  struct amdgpu_job *job);

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 49224bf383248cbeee70400240e935a8b0b6795e..468281f10e8d21b880e7e043bc97d015c14f9cdd 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -832,7 +832,7 @@ static int gmc_v6_0_sw_init(void *handle)
        if (r)
                return r;
 
-       amdgpu_vm_adjust_size(adev, 64, 9, 1);
+       amdgpu_vm_adjust_size(adev, 64, 9, 1, 40);
 
        adev->mc.mc_mask = 0xffffffffffULL;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index c39cf8440afd1320ad9484ccad636e020855c027..68a85051f4b705a39977d050003e36d575fb4418 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -971,7 +971,7 @@ static int gmc_v7_0_sw_init(void *handle)
         * Currently set to 4GB ((1 << 20) 4k pages).
         * Max GPUVM size for cayman and SI is 40 bits.
         */
-       amdgpu_vm_adjust_size(adev, 64, 9, 1);
+       amdgpu_vm_adjust_size(adev, 64, 9, 1, 40);
 
        /* Set the internal MC address mask
         * This is the max address of the GPU's

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 421e751a04646f9aabc866aa5ed8f643c4dcc042..46ec97e70e5c175412b7eee2a55dc7b800c315f7 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -1068,7 +1068,7 @@ static int gmc_v8_0_sw_init(void *handle)
         * Currently set to 4GB ((1 << 20) 4k pages).
         * Max GPUVM size for cayman and SI is 40 bits.
         */
-       amdgpu_vm_adjust_size(adev, 64, 9, 1);
+       amdgpu_vm_adjust_size(adev, 64, 9, 1, 40);
 
        /* Set the internal MC address mask
         * This is the max address of the GPU's

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 729e4d591293204fc0cef98ee291c3d73eb26769..cc972153d401ce1bc507a0e196e5148d22acdbc8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -770,10 +770,10 @@ static int gmc_v9_0_sw_init(void *handle)
        case CHIP_RAVEN:
                adev->mc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
                if (adev->rev_id == 0x0 || adev->rev_id == 0x1)
-                       amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3);
+                       amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48);
                else
                        /* vm_size is 64GB for legacy 2-level page support */
-                       amdgpu_vm_adjust_size(adev, 64, 9, 1);
+                       amdgpu_vm_adjust_size(adev, 64, 9, 1, 48);
                break;
        case CHIP_VEGA10:
                /* XXX Don't know how to get VRAM type yet. */
@@ -783,7 +783,7 @@ static int gmc_v9_0_sw_init(void *handle)
                 * vm size is 256TB (48bit), maximum size of Vega10,
                 * block size 512 (9bit)
                 */
-               amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3);
+               amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48);
                break;
        default:
                break;