]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
net: stmmac: add EHL RGMII 1Gbps PCI info and PCI ID
authorVoon Weifeng <weifeng.voon@intel.com>
Tue, 27 Aug 2019 01:38:10 +0000 (09:38 +0800)
committerDavid S. Miller <davem@davemloft.net>
Wed, 28 Aug 2019 04:59:37 +0000 (21:59 -0700)
Added EHL RGMII 1Gbps PCI ID. Different MII and speed will have
different PCI ID.

Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c

index edb76408308b9c46a3eec27a9fb78711e8db6228..e969dc9bb9f03f76eabe72a3d8bb1445aaeda69e 100644 (file)
@@ -213,6 +213,19 @@ static struct stmmac_pci_info ehl_sgmii1g_pci_info = {
        .setup = ehl_sgmii_data,
 };
 
+static int ehl_rgmii_data(struct pci_dev *pdev,
+                         struct plat_stmmacenet_data *plat)
+{
+       plat->bus_id = 1;
+       plat->phy_addr = 0;
+       plat->interface = PHY_INTERFACE_MODE_RGMII;
+       return ehl_common_data(pdev, plat);
+}
+
+static struct stmmac_pci_info ehl_rgmii1g_pci_info = {
+       .setup = ehl_rgmii_data,
+};
+
 static int tgl_common_data(struct pci_dev *pdev,
                           struct plat_stmmacenet_data *plat)
 {
@@ -481,6 +494,7 @@ static SIMPLE_DEV_PM_OPS(stmmac_pm_ops, stmmac_pci_suspend, stmmac_pci_resume);
 
 #define STMMAC_QUARK_ID  0x0937
 #define STMMAC_DEVICE_ID 0x1108
+#define STMMAC_EHL_RGMII1G_ID  0x4b30
 #define STMMAC_EHL_SGMII1G_ID  0x4b31
 #define STMMAC_TGL_SGMII1G_ID  0xa0ac
 
@@ -493,6 +507,7 @@ static const struct pci_device_id stmmac_id_table[] = {
        STMMAC_DEVICE(STMMAC, STMMAC_DEVICE_ID, stmmac_pci_info),
        STMMAC_DEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_MAC, stmmac_pci_info),
        STMMAC_DEVICE(INTEL, STMMAC_QUARK_ID, quark_pci_info),
+       STMMAC_DEVICE(INTEL, STMMAC_EHL_RGMII1G_ID, ehl_rgmii1g_pci_info),
        STMMAC_DEVICE(INTEL, STMMAC_EHL_SGMII1G_ID, ehl_sgmii1g_pci_info),
        STMMAC_DEVICE(INTEL, STMMAC_TGL_SGMII1G_ID, tgl_sgmii1g_pci_info),
        {}