]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: Configure interconnect target module for am4 des
authorTony Lindgren <tony@atomide.com>
Thu, 12 Dec 2019 17:46:17 +0000 (09:46 -0800)
committerTony Lindgren <tony@atomide.com>
Tue, 17 Dec 2019 16:11:01 +0000 (08:11 -0800)
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am4372.dtsi

index 9c98c7b3d6588d188adba3ae998f7b1ed09123b2..79a14b0ce43b737ad1ad39e9c8ba266adee326b6 100644 (file)
@@ -316,14 +316,35 @@ aes: aes@0 {
                        };
                };
 
-               des: des@53701000 {
-                       compatible = "ti,omap4-des";
+               des_target: target-module@53701000 {
+                       compatible = "ti,sysc-omap2", "ti,sysc";
                        ti,hwmods = "des";
-                       reg = <0x53701000 0xa0>;
-                       interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
-                       dmas = <&edma 34 0>,
-                               <&edma 33 0>;
-                       dma-names = "tx", "rx";
+                       reg = <0x53701030 0x4>,
+                             <0x53701034 0x4>,
+                             <0x53701038 0x4>;
+                       reg-names = "rev", "sysc", "syss";
+                       ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+                                        SYSC_OMAP2_AUTOIDLE)>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,syss-mask = <1>;
+                       /* Domains (P, C): per_pwrdm, l3_clkdm */
+                       clocks = <&l3_clkctrl AM4_L3_DES_CLKCTRL 0>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x53701000 0x1000>;
+
+                       des: des@0 {
+                               compatible = "ti,omap4-des";
+                               reg = <0 0xa0>;
+                               interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+                               dmas = <&edma 34 0>,
+                                      <&edma 33 0>;
+                               dma-names = "tx", "rx";
+                       };
                };
 
                gpmc: gpmc@50000000 {