]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: Add flash node for ls1088a qds and rdb
authorPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Wed, 10 May 2017 09:43:23 +0000 (15:13 +0530)
committerShawn Guo <shawnguo@kernel.org>
Mon, 15 May 2017 01:34:53 +0000 (09:34 +0800)
LS1088AQDS consist of NOR, NAND and FPGA connected over IFC
LS1088ARDB consist of NAND and FPGA connected over IFC.

So add flash information in ifc node of device tree.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi

index ff21055d66d306608ac37d799a89207ba53547a8..30128051d0c02ea3da6b61dc0b352a0216955eed 100644 (file)
@@ -110,6 +110,30 @@ eeprom@57 {
        };
 };
 
+&ifc {
+       ranges = <0 0 0x5 0x80000000 0x08000000
+                 2 0 0x5 0x30000000 0x00010000
+                 3 0 0x5 0x20000000 0x00010000>;
+       status = "okay";
+
+       nor@0,0 {
+               compatible = "cfi-flash";
+               reg = <0x0 0x0 0x8000000>;
+               bank-width = <2>;
+               device-width = <1>;
+       };
+
+       nand@2,0 {
+               compatible = "fsl,ifc-nand";
+               reg = <0x2 0x0 0x10000>;
+       };
+
+       fpga: board-control@3,0 {
+               compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
+               reg = <0x3 0x0 0x0000100>;
+       };
+};
+
 &duart0 {
        status = "okay";
 };
index ab62ef6b4c9d24f95d9eb65a3224c52606276a66..213abb72de93e90891b42263adf06854fa1f9fdd 100644 (file)
@@ -94,6 +94,22 @@ rtc@51 {
        };
 };
 
+&ifc {
+       ranges = <0 0 0x5 0x30000000 0x00010000
+                 2 0 0x5 0x20000000 0x00010000>;
+       status = "okay";
+
+       nand@0,0 {
+               compatible = "fsl,ifc-nand";
+               reg = <0x0 0x0 0x10000>;
+       };
+
+       fpga: board-control@2,0 {
+               compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
+               reg = <0x2 0x0 0x0000100>;
+       };
+};
+
 &duart0 {
        status = "okay";
 };
index 10b5775a7044ff30dd7507eac4a3c94572796e98..693197fae26b9c0ff544485ffd13ecb178c61150 100644 (file)
@@ -216,10 +216,6 @@ ifc: ifc@2240000 {
                        little-endian;
                        #address-cells = <2>;
                        #size-cells = <1>;
-
-                       ranges = <0 0 0x5 0x80000000 0x08000000
-                                 2 0 0x5 0x30000000 0x00010000
-                                 3 0 0x5 0x20000000 0x00010000>;
                        status = "disabled";
                };