]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
clk: tegra: pllout: Save and restore pllout context
authorSowjanya Komatineni <skomatineni@nvidia.com>
Fri, 16 Aug 2019 19:41:49 +0000 (12:41 -0700)
committerThierry Reding <treding@nvidia.com>
Mon, 11 Nov 2019 13:53:02 +0000 (14:53 +0100)
This patch implements save and restore of pllout context.

During system suspend, core power goes off and looses the settings
of the Tegra CAR controller registers.

So during suspend entry the state of pllout is saved and on resume
it is restored back to have pllout in same state as before suspend.

pllout rate is saved and restore in clock divider so it will be at
same rate as before suspend when pllout state is restored.

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-pll-out.c

index 35f2bf00e1e696a91d035d59daa9afce27875bba..d8bf89a81e6d940e81ead04ead0617ab621d7d39 100644 (file)
@@ -69,10 +69,19 @@ static void clk_pll_out_disable(struct clk_hw *hw)
                spin_unlock_irqrestore(pll_out->lock, flags);
 }
 
+static void tegra_clk_pll_out_restore_context(struct clk_hw *hw)
+{
+       if (!__clk_get_enable_count(hw->clk))
+               clk_pll_out_disable(hw);
+       else
+               clk_pll_out_enable(hw);
+}
+
 const struct clk_ops tegra_clk_pll_out_ops = {
        .is_enabled = clk_pll_out_is_enabled,
        .enable = clk_pll_out_enable,
        .disable = clk_pll_out_disable,
+       .restore_context = tegra_clk_pll_out_restore_context,
 };
 
 struct clk *tegra_clk_register_pll_out(const char *name,