]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for PXs2
authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Mon, 4 Sep 2017 06:58:36 +0000 (15:58 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Sun, 15 Oct 2017 08:35:26 +0000 (17:35 +0900)
Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC.
The thermal monitor node is included in sysctrl. Since the efuse might not
have a calibrated value of thermal monitor, this patch gives the default
value for PXs2.

Furthermore, add cpuN labels for reference in cooling-device property.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/boot/dts/uniphier-pxs2.dtsi

index 90b020c950837d5d0c9d2a43d74d4a2c208b7463..995d2756dccc0e589226dd474140f0c0ae4d037e 100644 (file)
@@ -7,6 +7,8 @@
  * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
+#include <dt-bindings/thermal/thermal.h>
+
 / {
        compatible = "socionext,uniphier-pxs2";
        #address-cells = <1>;
@@ -16,7 +18,7 @@ cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
@@ -24,9 +26,10 @@ cpu@0 {
                        enable-method = "psci";
                        next-level-cache = <&l2>;
                        operating-points-v2 = <&cpu_opp>;
+                       #cooling-cells = <2>;
                };
 
-               cpu@1 {
+               cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <1>;
@@ -36,7 +39,7 @@ cpu@1 {
                        operating-points-v2 = <&cpu_opp>;
                };
 
-               cpu@2 {
+               cpu2: cpu@2 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <2>;
@@ -46,7 +49,7 @@ cpu@2 {
                        operating-points-v2 = <&cpu_opp>;
                };
 
-               cpu@3 {
+               cpu3: cpu@3 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <3>;
@@ -114,6 +117,35 @@ arm_timer_clk: arm_timer_clk {
                };
        };
 
+       thermal-zones {
+               cpu-thermal {
+                       polling-delay-passive = <250>;  /* 250ms */
+                       polling-delay = <1000>;         /* 1000ms */
+                       thermal-sensors = <&pvtctl>;
+
+                       trips {
+                               cpu_crit: cpu-crit {
+                                       temperature = <95000>;  /* 95C */
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                               cpu_alert: cpu-alert {
+                                       temperature = <85000>;  /* 85C */
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+                       };
+
+                       cooling-maps {
+                               map {
+                                       trip = <&cpu_alert>;
+                                       cooling-device = <&cpu0
+                                           THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
+               };
+       };
+
        soc {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -358,6 +390,13 @@ sys_rst: reset {
                                compatible = "socionext,uniphier-pxs2-reset";
                                #reset-cells = <1>;
                        };
+
+                       pvtctl: pvtctl {
+                               compatible = "socionext,uniphier-pxs2-thermal";
+                               interrupts = <0 3 4>;
+                               #thermal-sensor-cells = <0>;
+                               socionext,tmod-calibration = <0x0f86 0x6844>;
+                       };
                };
 
                nand: nand@68000000 {