drm/i915: Extract glk_color_check()

Unlike the earlier platforms GLK has dedicated degamma and gamma
LUTs. And quite curiously the degamma LUT is actually controlled
via the PLANE_COLOR_CTL CSC enable bit. Hence we must compute
gamma_enable and csc_enable differently to pre-GLK platforms.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190327155045.28446-7-ville.syrjala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index cb40c89da0382139f9ab5f81f680cf1dcf9337a8..90ebcf7bef82807dc784ee5bf2b41c63562c6e2f 100644 (file)
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -883,6 +883,44 @@ static int chv_color_check(struct intel_crtc_state *crtc_state)
        return 0;
 }
 
+static u32 glk_gamma_mode(const struct intel_crtc_state *crtc_state)
+{
+       if (!crtc_state->gamma_enable ||
+           crtc_state_is_legacy_gamma(crtc_state))
+               return GAMMA_MODE_MODE_8BIT;
+       else
+               return GAMMA_MODE_MODE_10BIT;
+}
+
+static int glk_color_check(struct intel_crtc_state *crtc_state)
+{
+       int ret;
+
+       ret = check_luts(crtc_state);
+       if (ret)
+               return ret;
+
+       crtc_state->gamma_enable =
+               crtc_state->base.gamma_lut &&
+               !crtc_state->c8_planes;
+
+       /* On GLK+ degamma LUT is controlled by csc_enable */
+       crtc_state->csc_enable =
+               crtc_state->base.degamma_lut ||
+               crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB ||
+               crtc_state->base.ctm || crtc_state->limited_color_range;
+
+       crtc_state->gamma_mode = glk_gamma_mode(crtc_state);
+
+       crtc_state->csc_mode = 0;
+
+       ret = intel_color_add_affected_planes(crtc_state);
+       if (ret)
+               return ret;
+
+       return 0;
+}
+
 static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state)
 {
        u32 gamma_mode = 0;
@@ -993,6 +1031,8 @@ void intel_color_init(struct intel_crtc *crtc)
        } else {
                if (INTEL_GEN(dev_priv) >= 11)
                        dev_priv->display.color_check = icl_color_check;
+               else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+                       dev_priv->display.color_check = glk_color_check;
                else
                        dev_priv->display.color_check = _intel_color_check;