]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
intel_th: Add "rtit" source device
authorAlexander Shishkin <alexander.shishkin@linux.intel.com>
Fri, 3 May 2019 08:44:38 +0000 (11:44 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 3 May 2019 16:14:29 +0000 (18:14 +0200)
In some versions of Intel TH, the Software Trace Hub (STH) has a second
MMIO BAR dedicated to the input from Intel PT. This calls for a new
subdevice that will be enumerated if the corresponding BAR is present.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/hwtracing/intel_th/core.c
drivers/hwtracing/intel_th/intel_th.h
drivers/hwtracing/intel_th/pci.c

index 8c221e1ed12d851239874bcfa0cd739302273244..a0b8b0182daa82f9a1a5ba7a5eba535d9c4cb997 100644 (file)
@@ -500,6 +500,24 @@ static const struct intel_th_subdevice {
                .name   = "sth",
                .type   = INTEL_TH_SOURCE,
        },
+       {
+               .nres   = 2,
+               .res    = {
+                       {
+                               .start  = REG_STH_OFFSET,
+                               .end    = REG_STH_OFFSET + REG_STH_LENGTH - 1,
+                               .flags  = IORESOURCE_MEM,
+                       },
+                       {
+                               .start  = TH_MMIO_RTIT,
+                               .end    = 0,
+                               .flags  = IORESOURCE_MEM,
+                       },
+               },
+               .id     = -1,
+               .name   = "rtit",
+               .type   = INTEL_TH_SOURCE,
+       },
        {
                .nres   = 1,
                .res    = {
index 8c90c8d018671dd1e9be25f20a80881b835fbe16..3fca86d78fdd124f4e61a32c1907e1628afa5778 100644 (file)
@@ -228,6 +228,7 @@ int intel_th_output_enable(struct intel_th *th, unsigned int otype);
 enum th_mmio_idx {
        TH_MMIO_CONFIG = 0,
        TH_MMIO_SW = 1,
+       TH_MMIO_RTIT = 2,
        TH_MMIO_END,
 };
 
index 9dd2d75bd539258287024ccf1bc76d0ac72bd38f..fd8267bbaf2c36e6f95eb76b3d6728e9888f7c00 100644 (file)
@@ -20,6 +20,7 @@
 enum {
        TH_PCI_CONFIG_BAR       = 0,
        TH_PCI_STH_SW_BAR       = 2,
+       TH_PCI_RTIT_BAR         = 4,
 };
 
 #define BAR_MASK (BIT(TH_PCI_CONFIG_BAR) | BIT(TH_PCI_STH_SW_BAR))
@@ -75,8 +76,8 @@ static int intel_th_pci_probe(struct pci_dev *pdev,
                [TH_MMIO_CONFIG]        = pdev->resource[TH_PCI_CONFIG_BAR],
                [TH_MMIO_SW]            = pdev->resource[TH_PCI_STH_SW_BAR],
        };
+       int err, r = TH_MMIO_SW + 1;
        struct intel_th *th;
-       int err;
 
        err = pcim_enable_device(pdev);
        if (err)
@@ -86,8 +87,12 @@ static int intel_th_pci_probe(struct pci_dev *pdev,
        if (err)
                return err;
 
-       th = intel_th_alloc(&pdev->dev, drvdata, resource, TH_MMIO_END,
-                           pdev->irq);
+       if (pdev->resource[TH_PCI_RTIT_BAR].start) {
+               resource[TH_MMIO_RTIT] = pdev->resource[TH_PCI_RTIT_BAR];
+               r++;
+       }
+
+       th = intel_th_alloc(&pdev->dev, drvdata, resource, r, pdev->irq);
        if (IS_ERR(th))
                return PTR_ERR(th);