]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
clk: berlin: drop direct of_iomap of nodes reg property
authorAntoine Tenart <antoine.tenart@free-electrons.com>
Fri, 15 May 2015 23:50:34 +0000 (01:50 +0200)
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Mon, 18 May 2015 16:10:13 +0000 (18:10 +0200)
The Berlin clock driver was sharing a DT node with the pin controller
and the reset driver. All these devices are now sub-nodes of the chip
controller. This patch rework the Berlin clock driver to allow moving
the Berlin clock DT bindings into their own sub-node of the chip
controller node.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
drivers/clk/berlin/bg2.c
drivers/clk/berlin/bg2q.c

index d8e57097518b06bff3cd6e3d94a1933086ca6c46..73153fc45ee93067562732b66dd93da201a791b4 100644 (file)
@@ -508,10 +508,7 @@ static void __init berlin2_clock_setup(struct device_node *np)
        u8 avpll_flags = 0;
        int n;
 
-       if (of_device_is_compatible(parent_np, "syscon"))
-               np = parent_np;
-
-       gbase = of_iomap(np, 0);
+       gbase = of_iomap(parent_np, 0);
        if (!gbase)
                return;
 
@@ -689,9 +686,5 @@ static void __init berlin2_clock_setup(struct device_node *np)
 bg2_fail:
        iounmap(gbase);
 }
-CLK_OF_DECLARE(berlin2_clock, "marvell,berlin2-chip-ctrl",
-              berlin2_clock_setup);
-CLK_OF_DECLARE(berlin2cd_clock, "marvell,berlin2cd-chip-ctrl",
-              berlin2_clock_setup);
 CLK_OF_DECLARE(berlin2_clk, "marvell,berlin2-clk",
               berlin2_clock_setup);
index 638a649ebed737a2faf188a4995e1c2c50c40a05..221f40c2b850c1fafc1143e7f5b4458ecad55982 100644 (file)
@@ -295,17 +295,14 @@ static void __init berlin2q_clock_setup(struct device_node *np)
        struct clk *clk;
        int n;
 
-       if (of_device_is_compatible(parent_np, "syscon"))
-               np = parent_np;
-
-       gbase = of_iomap(np, 0);
+       gbase = of_iomap(parent_np, 0);
        if (!gbase) {
                pr_err("%s: Unable to map global base\n", np->full_name);
                return;
        }
 
        /* BG2Q CPU PLL is not part of global registers */
-       cpupll_base = of_iomap(np, 1);
+       cpupll_base = of_iomap(parent_np, 1);
        if (!cpupll_base) {
                pr_err("%s: Unable to map cpupll base\n", np->full_name);
                iounmap(gbase);
@@ -388,7 +385,5 @@ static void __init berlin2q_clock_setup(struct device_node *np)
        iounmap(cpupll_base);
        iounmap(gbase);
 }
-CLK_OF_DECLARE(berlin2q_clock, "marvell,berlin2q-chip-ctrl",
-              berlin2q_clock_setup);
 CLK_OF_DECLARE(berlin2q_clk, "marvell,berlin2q-clk",
               berlin2q_clock_setup);