PCI: Add #defines for Completion Timeout Disable feature

Add #defines for the Completion Timeout Disable feature and use them.  No
functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 4650fb294e7a5391187b23763b66a83283793f7b..2f7cd0ef3cdc0347df7978f2ca1d665a76afa357 100644 (file)
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -1654,14 +1654,14 @@ static int pnv_eeh_restore_vf_config(struct pci_dn *pdn)
                eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
                                      2, devctl);
 
-               /* Disable Completion Timeout */
+               /* Disable Completion Timeout if possible */
                eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCAP2,
                                     4, &cap2);
-               if (cap2 & 0x10) {
+               if (cap2 & PCI_EXP_DEVCAP2_COMP_TMOUT_DIS) {
                        eeh_ops->read_config(pdn,
                                             edev->pcie_cap + PCI_EXP_DEVCTL2,
                                             4, &cap2);
-                       cap2 |= 0x10;
+                       cap2 |= PCI_EXP_DEVCTL2_COMP_TMOUT_DIS;
                        eeh_ops->write_config(pdn,
                                              edev->pcie_cap + PCI_EXP_DEVCTL2,
                                              4, cap2);

diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 70c2b2ade0483fde34bdcd77a4cf4bcabac94252..9dc67643fc180af3a71b3776c3808f0457f0917b 100644 (file)
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -622,6 +622,7 @@
  * safely.
  */
 #define PCI_EXP_DEVCAP2                36      /* Device Capabilities 2 */
+#define  PCI_EXP_DEVCAP2_COMP_TMOUT_DIS        0x00000010 /* Completion Timeout Disable supported */
 #define  PCI_EXP_DEVCAP2_ARI           0x00000020 /* Alternative Routing-ID */
 #define  PCI_EXP_DEVCAP2_ATOMIC_ROUTE  0x00000040 /* Atomic Op routing */
 #define PCI_EXP_DEVCAP2_ATOMIC_COMP64  0x00000100 /* Atomic 64-bit compare */
@@ -631,6 +632,7 @@
 #define  PCI_EXP_DEVCAP2_OBFF_WAKE     0x00080000 /* Re-use WAKE# for OBFF */
 #define PCI_EXP_DEVCTL2                40      /* Device Control 2 */
 #define  PCI_EXP_DEVCTL2_COMP_TIMEOUT  0x000f  /* Completion Timeout Value */
+#define  PCI_EXP_DEVCTL2_COMP_TMOUT_DIS        0x0010  /* Completion Timeout Disable */
 #define  PCI_EXP_DEVCTL2_ARI           0x0020  /* Alternative Routing-ID */
 #define PCI_EXP_DEVCTL2_ATOMIC_REQ     0x0040  /* Set Atomic requests */
 #define PCI_EXP_DEVCTL2_ATOMIC_EGRESS_BLOCK 0x0080 /* Block atomic egress */