]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
spi/bcm63xx-hsspi: allow providing clock rate through a second clock
authorJonas Gorski <jonas.gorski@gmail.com>
Wed, 1 Mar 2017 09:08:12 +0000 (10:08 +0100)
committerMark Brown <broonie@kernel.org>
Mon, 13 Mar 2017 15:51:10 +0000 (15:51 +0000)
The HSSPI block actually has two clock inputs, one for gating the block,
and one for the PLL rate. To allow these to be represented as two clocks,
add support for retrieving the rate from a separate "pll" clock, if the
"hsspi" clock does not provide one.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-bcm63xx-hsspi.c

index 55789f7cda9280b2f0d21b65b6a7f3c019780047..79096d17ebdea345ca9a2b201d74966f2f7b7fb0 100644 (file)
@@ -351,8 +351,16 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev)
                return PTR_ERR(clk);
 
        rate = clk_get_rate(clk);
-       if (!rate)
-               return -EINVAL;
+       if (!rate) {
+               struct clk *pll_clk = devm_clk_get(dev, "pll");
+
+               if (IS_ERR(pll_clk))
+                       return PTR_ERR(pll_clk);
+
+               rate = clk_get_rate(pll_clk);
+               if (!rate)
+                       return -EINVAL;
+       }
 
        ret = clk_prepare_enable(clk);
        if (ret)