drm/arm/malidp: Split malidp interrupt initialization functions.

Malidp uses two interrupts ie 1. se_irq - used for memory writeback.
 and 2. de_irq - used for display output.
Extract the hardware initialization part from malidp interrupt registration
ie (malidp_de_irq_init()/ malidp_se_irq_init()) into a separate function
(ie malidp_de_irq_hw_init()/malidp_se_irq_hw_init())
which will be later invoked from runtime_pm_resume function when it needs
to re-enable the interrupts.

Signed-off-by: Ayan Kumar Halder <ayan.halder@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>

diff --git a/drivers/gpu/drm/arm/malidp_hw.c b/drivers/gpu/drm/arm/malidp_hw.c
index e30a25ceea2c9e1345ec87297a8cba39d1deaeac..47fc112ee32e39d6a593242d54f16d8c827dbb4b 100644 (file)
--- a/drivers/gpu/drm/arm/malidp_hw.c
+++ b/drivers/gpu/drm/arm/malidp_hw.c
@@ -967,6 +967,23 @@ static irqreturn_t malidp_de_irq_thread_handler(int irq, void *arg)
        return IRQ_HANDLED;
 }
 
+void malidp_de_irq_hw_init(struct malidp_hw_device *hwdev)
+{
+       /* ensure interrupts are disabled */
+       malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff);
+       malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff);
+       malidp_hw_disable_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff);
+       malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff);
+
+       /* first enable the DC block IRQs */
+       malidp_hw_enable_irq(hwdev, MALIDP_DC_BLOCK,
+                            hwdev->hw->map.dc_irq_map.irq_mask);
+
+       /* now enable the DE block IRQs */
+       malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK,
+                            hwdev->hw->map.de_irq_map.irq_mask);
+}
+
 int malidp_de_irq_init(struct drm_device *drm, int irq)
 {
        struct malidp_drm *malidp = drm->dev_private;
@@ -987,13 +1004,7 @@ int malidp_de_irq_init(struct drm_device *drm, int irq)
                return ret;
        }
 
-       /* first enable the DC block IRQs */
-       malidp_hw_enable_irq(hwdev, MALIDP_DC_BLOCK,
-                            hwdev->hw->map.dc_irq_map.irq_mask);
-
-       /* now enable the DE block IRQs */
-       malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK,
-                            hwdev->hw->map.de_irq_map.irq_mask);
+       malidp_de_irq_hw_init(hwdev);
 
        return 0;
 }
@@ -1069,6 +1080,16 @@ static irqreturn_t malidp_se_irq(int irq, void *arg)
        return IRQ_HANDLED;
 }
 
+void malidp_se_irq_hw_init(struct malidp_hw_device *hwdev)
+{
+       /* ensure interrupts are disabled */
+       malidp_hw_disable_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff);
+       malidp_hw_clear_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff);
+
+       malidp_hw_enable_irq(hwdev, MALIDP_SE_BLOCK,
+                            hwdev->hw->map.se_irq_map.irq_mask);
+}
+
 static irqreturn_t malidp_se_irq_thread_handler(int irq, void *arg)
 {
        return IRQ_HANDLED;
@@ -1093,8 +1114,7 @@ int malidp_se_irq_init(struct drm_device *drm, int irq)
        }
 
        hwdev->mw_state = MW_NOT_ENABLED;
-       malidp_hw_enable_irq(hwdev, MALIDP_SE_BLOCK,
-                            hwdev->hw->map.se_irq_map.irq_mask);
+       malidp_se_irq_hw_init(hwdev);
 
        return 0;
 }

diff --git a/drivers/gpu/drm/arm/malidp_hw.h b/drivers/gpu/drm/arm/malidp_hw.h
index 8304d7763b8dbeae952efd6780ea453cbdbab846..f5b3eab8398ba9fe91214752d5b89aa8b4d8c6ad 100644 (file)
--- a/drivers/gpu/drm/arm/malidp_hw.h
+++ b/drivers/gpu/drm/arm/malidp_hw.h
@@ -302,6 +302,8 @@ static inline void malidp_hw_enable_irq(struct malidp_hw_device *hwdev,
 }
 
 int malidp_de_irq_init(struct drm_device *drm, int irq);
+void malidp_se_irq_hw_init(struct malidp_hw_device *hwdev);
+void malidp_de_irq_hw_init(struct malidp_hw_device *hwdev);
 void malidp_de_irq_fini(struct malidp_hw_device *hwdev);
 int malidp_se_irq_init(struct drm_device *drm, int irq);
 void malidp_se_irq_fini(struct malidp_hw_device *hwdev);