From: Liu Jiang Date: Tue, 13 Mar 2012 14:07:09 +0000 (+0800) Subject: [IA64] Fix ISA IRQ trigger model and polarity setting X-Git-Tag: v3.4-rc1~107^2~1 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=0577bb661ee0ce4303c21353ac326f23efbc209c;p=linux.git [IA64] Fix ISA IRQ trigger model and polarity setting When handling Interrupt Source Override in MADT table, the default ISA IRQ trigger model and polarity should be edge-rising. Current IA64 implmentation doesn't follow the specification and set default ISA IRQ trigger model as level-low. With that wrong configuration and when system runs out of interrupt vectors, it will cause vector sharing among edge triggered ISA IRQ and level triggered PCI IRQ, then interrupt storm. So change the code to follow the specification. Signed-off-by: Liu Jiang Signed-off-by: Tony Luck --- diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c index 5207035dc061..2d801bfe16ac 100644 --- a/arch/ia64/kernel/acpi.c +++ b/arch/ia64/kernel/acpi.c @@ -349,11 +349,11 @@ acpi_parse_int_src_ovr(struct acpi_subtable_header * header, iosapic_override_isa_irq(p->source_irq, p->global_irq, ((p->inti_flags & ACPI_MADT_POLARITY_MASK) == - ACPI_MADT_POLARITY_ACTIVE_HIGH) ? - IOSAPIC_POL_HIGH : IOSAPIC_POL_LOW, + ACPI_MADT_POLARITY_ACTIVE_LOW) ? + IOSAPIC_POL_LOW : IOSAPIC_POL_HIGH, ((p->inti_flags & ACPI_MADT_TRIGGER_MASK) == - ACPI_MADT_TRIGGER_EDGE) ? - IOSAPIC_EDGE : IOSAPIC_LEVEL); + ACPI_MADT_TRIGGER_LEVEL) ? + IOSAPIC_LEVEL : IOSAPIC_EDGE); return 0; }