From: Ville Syrjälä Date: Fri, 13 May 2016 20:41:36 +0000 (+0300) Subject: drm/i915: Update cached cdclk state from broxton_init_cdclk() X-Git-Tag: v4.8-rc1~62^2~41^2~39 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=089c6fd503b050eb9996e02e8675dfabb48e51e8;p=linux.git drm/i915: Update cached cdclk state from broxton_init_cdclk() Let's make sure our cached cdclk state is accurate right after broxton_init_cdclk() whether or not we end up changing the cdclk frequency. Signed-off-by: Ville Syrjälä Link: http://patchwork.freedesktop.org/patch/msgid/1463172100-24715-18-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 6382241cb787..4dfeb6ebc015 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5428,13 +5428,10 @@ bool broxton_cdclk_verify_state(struct drm_i915_private *dev_priv) void broxton_init_cdclk(struct drm_i915_private *dev_priv) { - /* check if cd clock is enabled */ - if (broxton_cdclk_is_enabled(dev_priv)) { - DRM_DEBUG_KMS("CDCLK already enabled, won't reprogram it\n"); - return; - } + intel_update_cdclk(dev_priv->dev); - DRM_DEBUG_KMS("CDCLK not enabled, enabling it\n"); + if (dev_priv->cdclk_pll.vco != 0) + return; /* * FIXME: