From: Kevin Wang Date: Thu, 25 Jul 2019 01:59:46 +0000 (+0800) Subject: drm/amd/powerplay: move smu types to smu_types.h X-Git-Tag: v5.4-rc1~106^2~17^2~179 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=0ba5eda81a82719c229c819929e8297559522429;p=linux.git drm/amd/powerplay: move smu types to smu_types.h move some enum type (message, feature, clock) to smu_types.h. these types is too long in amdgpu_smu.h, and not clearly. Signed-off-by: Kevin Wang Reviewed-by: Evan Quan Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h index 33d2d75ba903..397040a4d1b4 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h @@ -26,6 +26,7 @@ #include "kgd_pp_interface.h" #include "dm_pp_interface.h" #include "dm_pp_smu.h" +#include "smu_types.h" #define SMU_THERMAL_MINIMUM_ALERT_TEMP 0 #define SMU_THERMAL_MAXIMUM_ALERT_TEMP 255 @@ -150,134 +151,6 @@ struct smu_power_state { struct smu_hw_power_state hardware; }; -enum smu_message_type -{ - SMU_MSG_TestMessage = 0, - SMU_MSG_GetSmuVersion, - SMU_MSG_GetDriverIfVersion, - SMU_MSG_SetAllowedFeaturesMaskLow, - SMU_MSG_SetAllowedFeaturesMaskHigh, - SMU_MSG_EnableAllSmuFeatures, - SMU_MSG_DisableAllSmuFeatures, - SMU_MSG_EnableSmuFeaturesLow, - SMU_MSG_EnableSmuFeaturesHigh, - SMU_MSG_DisableSmuFeaturesLow, - SMU_MSG_DisableSmuFeaturesHigh, - SMU_MSG_GetEnabledSmuFeaturesLow, - SMU_MSG_GetEnabledSmuFeaturesHigh, - SMU_MSG_SetWorkloadMask, - SMU_MSG_SetPptLimit, - SMU_MSG_SetDriverDramAddrHigh, - SMU_MSG_SetDriverDramAddrLow, - SMU_MSG_SetToolsDramAddrHigh, - SMU_MSG_SetToolsDramAddrLow, - SMU_MSG_TransferTableSmu2Dram, - SMU_MSG_TransferTableDram2Smu, - SMU_MSG_UseDefaultPPTable, - SMU_MSG_UseBackupPPTable, - SMU_MSG_RunBtc, - SMU_MSG_RequestI2CBus, - SMU_MSG_ReleaseI2CBus, - SMU_MSG_SetFloorSocVoltage, - SMU_MSG_SoftReset, - SMU_MSG_StartBacoMonitor, - SMU_MSG_CancelBacoMonitor, - SMU_MSG_EnterBaco, - SMU_MSG_SetSoftMinByFreq, - SMU_MSG_SetSoftMaxByFreq, - SMU_MSG_SetHardMinByFreq, - SMU_MSG_SetHardMaxByFreq, - SMU_MSG_GetMinDpmFreq, - SMU_MSG_GetMaxDpmFreq, - SMU_MSG_GetDpmFreqByIndex, - SMU_MSG_GetDpmClockFreq, - SMU_MSG_GetSsVoltageByDpm, - SMU_MSG_SetMemoryChannelConfig, - SMU_MSG_SetGeminiMode, - SMU_MSG_SetGeminiApertureHigh, - SMU_MSG_SetGeminiApertureLow, - SMU_MSG_SetMinLinkDpmByIndex, - SMU_MSG_OverridePcieParameters, - SMU_MSG_OverDriveSetPercentage, - SMU_MSG_SetMinDeepSleepDcefclk, - SMU_MSG_ReenableAcDcInterrupt, - SMU_MSG_NotifyPowerSource, - SMU_MSG_SetUclkFastSwitch, - SMU_MSG_SetUclkDownHyst, - SMU_MSG_GfxDeviceDriverReset, - SMU_MSG_GetCurrentRpm, - SMU_MSG_SetVideoFps, - SMU_MSG_SetTjMax, - SMU_MSG_SetFanTemperatureTarget, - SMU_MSG_PrepareMp1ForUnload, - SMU_MSG_DramLogSetDramAddrHigh, - SMU_MSG_DramLogSetDramAddrLow, - SMU_MSG_DramLogSetDramSize, - SMU_MSG_SetFanMaxRpm, - SMU_MSG_SetFanMinPwm, - SMU_MSG_ConfigureGfxDidt, - SMU_MSG_NumOfDisplays, - SMU_MSG_RemoveMargins, - SMU_MSG_ReadSerialNumTop32, - SMU_MSG_ReadSerialNumBottom32, - SMU_MSG_SetSystemVirtualDramAddrHigh, - SMU_MSG_SetSystemVirtualDramAddrLow, - SMU_MSG_WaflTest, - SMU_MSG_SetFclkGfxClkRatio, - SMU_MSG_AllowGfxOff, - SMU_MSG_DisallowGfxOff, - SMU_MSG_GetPptLimit, - SMU_MSG_GetDcModeMaxDpmFreq, - SMU_MSG_GetDebugData, - SMU_MSG_SetXgmiMode, - SMU_MSG_RunAfllBtc, - SMU_MSG_ExitBaco, - SMU_MSG_PrepareMp1ForReset, - SMU_MSG_PrepareMp1ForShutdown, - SMU_MSG_SetMGpuFanBoostLimitRpm, - SMU_MSG_GetAVFSVoltageByDpm, - SMU_MSG_PowerUpVcn, - SMU_MSG_PowerDownVcn, - SMU_MSG_PowerUpJpeg, - SMU_MSG_PowerDownJpeg, - SMU_MSG_BacoAudioD3PME, - SMU_MSG_ArmD3, - SMU_MSG_RunGfxDcBtc, - SMU_MSG_RunSocDcBtc, - SMU_MSG_SetMemoryChannelEnable, - SMU_MSG_SetDfSwitchType, - SMU_MSG_GetVoltageByDpm, - SMU_MSG_GetVoltageByDpmOverdrive, - SMU_MSG_PowerUpVcn0, - SMU_MSG_PowerDownVcn01, - SMU_MSG_PowerUpVcn1, - SMU_MSG_PowerDownVcn1, - SMU_MSG_MAX_COUNT, -}; - -enum smu_clk_type -{ - SMU_GFXCLK, - SMU_VCLK, - SMU_DCLK, - SMU_ECLK, - SMU_SOCCLK, - SMU_UCLK, - SMU_DCEFCLK, - SMU_DISPCLK, - SMU_PIXCLK, - SMU_PHYCLK, - SMU_FCLK, - SMU_SCLK, - SMU_MCLK, - SMU_PCIE, - SMU_OD_SCLK, - SMU_OD_MCLK, - SMU_OD_VDDC_CURVE, - SMU_OD_RANGE, - SMU_CLK_COUNT, -}; - enum smu_power_src_type { SMU_POWER_SOURCE_AC, @@ -285,63 +158,6 @@ enum smu_power_src_type SMU_POWER_SOURCE_COUNT, }; -enum smu_feature_mask -{ - SMU_FEATURE_DPM_PREFETCHER_BIT, - SMU_FEATURE_DPM_GFXCLK_BIT, - SMU_FEATURE_DPM_UCLK_BIT, - SMU_FEATURE_DPM_SOCCLK_BIT, - SMU_FEATURE_DPM_UVD_BIT, - SMU_FEATURE_DPM_VCE_BIT, - SMU_FEATURE_ULV_BIT, - SMU_FEATURE_DPM_MP0CLK_BIT, - SMU_FEATURE_DPM_LINK_BIT, - SMU_FEATURE_DPM_DCEFCLK_BIT, - SMU_FEATURE_DS_GFXCLK_BIT, - SMU_FEATURE_DS_SOCCLK_BIT, - SMU_FEATURE_DS_LCLK_BIT, - SMU_FEATURE_PPT_BIT, - SMU_FEATURE_TDC_BIT, - SMU_FEATURE_THERMAL_BIT, - SMU_FEATURE_GFX_PER_CU_CG_BIT, - SMU_FEATURE_RM_BIT, - SMU_FEATURE_DS_DCEFCLK_BIT, - SMU_FEATURE_ACDC_BIT, - SMU_FEATURE_VR0HOT_BIT, - SMU_FEATURE_VR1HOT_BIT, - SMU_FEATURE_FW_CTF_BIT, - SMU_FEATURE_LED_DISPLAY_BIT, - SMU_FEATURE_FAN_CONTROL_BIT, - SMU_FEATURE_GFX_EDC_BIT, - SMU_FEATURE_GFXOFF_BIT, - SMU_FEATURE_CG_BIT, - SMU_FEATURE_DPM_FCLK_BIT, - SMU_FEATURE_DS_FCLK_BIT, - SMU_FEATURE_DS_MP1CLK_BIT, - SMU_FEATURE_DS_MP0CLK_BIT, - SMU_FEATURE_XGMI_BIT, - SMU_FEATURE_DPM_GFX_PACE_BIT, - SMU_FEATURE_MEM_VDDCI_SCALING_BIT, - SMU_FEATURE_MEM_MVDD_SCALING_BIT, - SMU_FEATURE_DS_UCLK_BIT, - SMU_FEATURE_GFX_ULV_BIT, - SMU_FEATURE_FW_DSTATE_BIT, - SMU_FEATURE_BACO_BIT, - SMU_FEATURE_VCN_PG_BIT, - SMU_FEATURE_JPEG_PG_BIT, - SMU_FEATURE_USB_PG_BIT, - SMU_FEATURE_RSMU_SMN_CG_BIT, - SMU_FEATURE_APCC_PLUS_BIT, - SMU_FEATURE_GTHR_BIT, - SMU_FEATURE_GFX_DCS_BIT, - SMU_FEATURE_GFX_SS_BIT, - SMU_FEATURE_OUT_OF_BAND_MONITOR_BIT, - SMU_FEATURE_TEMP_DEPENDENT_VMIN_BIT, - SMU_FEATURE_MMHUB_PG_BIT, - SMU_FEATURE_ATHUB_PG_BIT, - SMU_FEATURE_COUNT, -}; - enum smu_memory_pool_size { SMU_MEMORY_POOL_SIZE_ZERO = 0, diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_types.h b/drivers/gpu/drm/amd/powerplay/inc/smu_types.h new file mode 100644 index 000000000000..29d14c162417 --- /dev/null +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_types.h @@ -0,0 +1,210 @@ +/* + * Copyright 2019 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef __SMU_TYPES_H__ +#define __SMU_TYPES_H__ + + +enum smu_message_type { + SMU_MSG_TestMessage = 0, + SMU_MSG_GetSmuVersion, + SMU_MSG_GetDriverIfVersion, + SMU_MSG_SetAllowedFeaturesMaskLow, + SMU_MSG_SetAllowedFeaturesMaskHigh, + SMU_MSG_EnableAllSmuFeatures, + SMU_MSG_DisableAllSmuFeatures, + SMU_MSG_EnableSmuFeaturesLow, + SMU_MSG_EnableSmuFeaturesHigh, + SMU_MSG_DisableSmuFeaturesLow, + SMU_MSG_DisableSmuFeaturesHigh, + SMU_MSG_GetEnabledSmuFeaturesLow, + SMU_MSG_GetEnabledSmuFeaturesHigh, + SMU_MSG_SetWorkloadMask, + SMU_MSG_SetPptLimit, + SMU_MSG_SetDriverDramAddrHigh, + SMU_MSG_SetDriverDramAddrLow, + SMU_MSG_SetToolsDramAddrHigh, + SMU_MSG_SetToolsDramAddrLow, + SMU_MSG_TransferTableSmu2Dram, + SMU_MSG_TransferTableDram2Smu, + SMU_MSG_UseDefaultPPTable, + SMU_MSG_UseBackupPPTable, + SMU_MSG_RunBtc, + SMU_MSG_RequestI2CBus, + SMU_MSG_ReleaseI2CBus, + SMU_MSG_SetFloorSocVoltage, + SMU_MSG_SoftReset, + SMU_MSG_StartBacoMonitor, + SMU_MSG_CancelBacoMonitor, + SMU_MSG_EnterBaco, + SMU_MSG_SetSoftMinByFreq, + SMU_MSG_SetSoftMaxByFreq, + SMU_MSG_SetHardMinByFreq, + SMU_MSG_SetHardMaxByFreq, + SMU_MSG_GetMinDpmFreq, + SMU_MSG_GetMaxDpmFreq, + SMU_MSG_GetDpmFreqByIndex, + SMU_MSG_GetDpmClockFreq, + SMU_MSG_GetSsVoltageByDpm, + SMU_MSG_SetMemoryChannelConfig, + SMU_MSG_SetGeminiMode, + SMU_MSG_SetGeminiApertureHigh, + SMU_MSG_SetGeminiApertureLow, + SMU_MSG_SetMinLinkDpmByIndex, + SMU_MSG_OverridePcieParameters, + SMU_MSG_OverDriveSetPercentage, + SMU_MSG_SetMinDeepSleepDcefclk, + SMU_MSG_ReenableAcDcInterrupt, + SMU_MSG_NotifyPowerSource, + SMU_MSG_SetUclkFastSwitch, + SMU_MSG_SetUclkDownHyst, + SMU_MSG_GfxDeviceDriverReset, + SMU_MSG_GetCurrentRpm, + SMU_MSG_SetVideoFps, + SMU_MSG_SetTjMax, + SMU_MSG_SetFanTemperatureTarget, + SMU_MSG_PrepareMp1ForUnload, + SMU_MSG_DramLogSetDramAddrHigh, + SMU_MSG_DramLogSetDramAddrLow, + SMU_MSG_DramLogSetDramSize, + SMU_MSG_SetFanMaxRpm, + SMU_MSG_SetFanMinPwm, + SMU_MSG_ConfigureGfxDidt, + SMU_MSG_NumOfDisplays, + SMU_MSG_RemoveMargins, + SMU_MSG_ReadSerialNumTop32, + SMU_MSG_ReadSerialNumBottom32, + SMU_MSG_SetSystemVirtualDramAddrHigh, + SMU_MSG_SetSystemVirtualDramAddrLow, + SMU_MSG_WaflTest, + SMU_MSG_SetFclkGfxClkRatio, + SMU_MSG_AllowGfxOff, + SMU_MSG_DisallowGfxOff, + SMU_MSG_GetPptLimit, + SMU_MSG_GetDcModeMaxDpmFreq, + SMU_MSG_GetDebugData, + SMU_MSG_SetXgmiMode, + SMU_MSG_RunAfllBtc, + SMU_MSG_ExitBaco, + SMU_MSG_PrepareMp1ForReset, + SMU_MSG_PrepareMp1ForShutdown, + SMU_MSG_SetMGpuFanBoostLimitRpm, + SMU_MSG_GetAVFSVoltageByDpm, + SMU_MSG_PowerUpVcn, + SMU_MSG_PowerDownVcn, + SMU_MSG_PowerUpJpeg, + SMU_MSG_PowerDownJpeg, + SMU_MSG_BacoAudioD3PME, + SMU_MSG_ArmD3, + SMU_MSG_RunGfxDcBtc, + SMU_MSG_RunSocDcBtc, + SMU_MSG_SetMemoryChannelEnable, + SMU_MSG_SetDfSwitchType, + SMU_MSG_GetVoltageByDpm, + SMU_MSG_GetVoltageByDpmOverdrive, + SMU_MSG_PowerUpVcn0, + SMU_MSG_PowerDownVcn01, + SMU_MSG_PowerUpVcn1, + SMU_MSG_PowerDownVcn1, + SMU_MSG_MAX_COUNT, +}; + +enum smu_clk_type { + SMU_GFXCLK, + SMU_VCLK, + SMU_DCLK, + SMU_ECLK, + SMU_SOCCLK, + SMU_UCLK, + SMU_DCEFCLK, + SMU_DISPCLK, + SMU_PIXCLK, + SMU_PHYCLK, + SMU_FCLK, + SMU_SCLK, + SMU_MCLK, + SMU_PCIE, + SMU_OD_SCLK, + SMU_OD_MCLK, + SMU_OD_VDDC_CURVE, + SMU_OD_RANGE, + SMU_CLK_COUNT, +}; + +enum smu_feature_mask { + SMU_FEATURE_DPM_PREFETCHER_BIT, + SMU_FEATURE_DPM_GFXCLK_BIT, + SMU_FEATURE_DPM_UCLK_BIT, + SMU_FEATURE_DPM_SOCCLK_BIT, + SMU_FEATURE_DPM_UVD_BIT, + SMU_FEATURE_DPM_VCE_BIT, + SMU_FEATURE_ULV_BIT, + SMU_FEATURE_DPM_MP0CLK_BIT, + SMU_FEATURE_DPM_LINK_BIT, + SMU_FEATURE_DPM_DCEFCLK_BIT, + SMU_FEATURE_DS_GFXCLK_BIT, + SMU_FEATURE_DS_SOCCLK_BIT, + SMU_FEATURE_DS_LCLK_BIT, + SMU_FEATURE_PPT_BIT, + SMU_FEATURE_TDC_BIT, + SMU_FEATURE_THERMAL_BIT, + SMU_FEATURE_GFX_PER_CU_CG_BIT, + SMU_FEATURE_RM_BIT, + SMU_FEATURE_DS_DCEFCLK_BIT, + SMU_FEATURE_ACDC_BIT, + SMU_FEATURE_VR0HOT_BIT, + SMU_FEATURE_VR1HOT_BIT, + SMU_FEATURE_FW_CTF_BIT, + SMU_FEATURE_LED_DISPLAY_BIT, + SMU_FEATURE_FAN_CONTROL_BIT, + SMU_FEATURE_GFX_EDC_BIT, + SMU_FEATURE_GFXOFF_BIT, + SMU_FEATURE_CG_BIT, + SMU_FEATURE_DPM_FCLK_BIT, + SMU_FEATURE_DS_FCLK_BIT, + SMU_FEATURE_DS_MP1CLK_BIT, + SMU_FEATURE_DS_MP0CLK_BIT, + SMU_FEATURE_XGMI_BIT, + SMU_FEATURE_DPM_GFX_PACE_BIT, + SMU_FEATURE_MEM_VDDCI_SCALING_BIT, + SMU_FEATURE_MEM_MVDD_SCALING_BIT, + SMU_FEATURE_DS_UCLK_BIT, + SMU_FEATURE_GFX_ULV_BIT, + SMU_FEATURE_FW_DSTATE_BIT, + SMU_FEATURE_BACO_BIT, + SMU_FEATURE_VCN_PG_BIT, + SMU_FEATURE_JPEG_PG_BIT, + SMU_FEATURE_USB_PG_BIT, + SMU_FEATURE_RSMU_SMN_CG_BIT, + SMU_FEATURE_APCC_PLUS_BIT, + SMU_FEATURE_GTHR_BIT, + SMU_FEATURE_GFX_DCS_BIT, + SMU_FEATURE_GFX_SS_BIT, + SMU_FEATURE_OUT_OF_BAND_MONITOR_BIT, + SMU_FEATURE_TEMP_DEPENDENT_VMIN_BIT, + SMU_FEATURE_MMHUB_PG_BIT, + SMU_FEATURE_ATHUB_PG_BIT, + SMU_FEATURE_COUNT, +}; + +#endif +