From: Boris Brezillon <boris.brezillon@free-electrons.com>
Date: Fri, 10 Oct 2014 13:50:21 +0000 (+0200)
Subject: ARM: at91/dt: sam9263: fix PLLB frequencies
X-Git-Tag: v3.18-rc2~1^2~2^2
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=106c67af2fb938880edbf43b49dabbd8d2534839;p=linux.git

ARM: at91/dt: sam9263: fix PLLB frequencies

PLLB input and output ranges were wrongly copied from at91sam9261 as the
datasheet didn't mention explicitly PLLB. Correct their values.

This fixes USB.

Reported-by: Andreas Henriksson <andreas.henriksson@endian.se>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Andreas Henriksson <andreas.henriksson@endian.se>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---

diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index d68b3c4862bc..51416c7d0625 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -122,9 +122,10 @@ pllb: pllbck {
 					interrupts-extended = <&pmc AT91_PMC_LOCKB>;
 					clocks = <&main>;
 					reg = <1>;
-					atmel,clk-input-range = <1000000 5000000>;
+					atmel,clk-input-range = <1000000 32000000>;
 					#atmel,pll-clk-output-range-cells = <4>;
-					atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
+					atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
+								<190000000 240000000 2 1>;
 				};
 
 				mck: masterck {