From: Jesse Barnes <jesse.barnes@intel.com>
Date: Thu, 7 Feb 2008 19:15:20 +0000 (-0800)
Subject: i915: Fix GR register array size off-by-one bug
X-Git-Tag: v2.6.25-rc1~294
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=123f794fa7d592644881a20801638d88521d0b06;p=linux.git

i915: Fix GR register array size off-by-one bug

Make sure we have enough room for all the GR registers or we'll end up
clobbering the AR index register (which should actually be harmless
unless the BIOS is making an assumption about it).

Noticed-by: Jens Axboe <jens.axboe@oracle.com>
Signed-off-by: Jesse Barnes <jesse.barnes@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
---

diff --git a/drivers/char/drm/i915_drv.h b/drivers/char/drm/i915_drv.h
index 37bbf6729b4e..f8308bfb2613 100644
--- a/drivers/char/drm/i915_drv.h
+++ b/drivers/char/drm/i915_drv.h
@@ -187,7 +187,7 @@ typedef struct drm_i915_private {
 	u32 saveSWF2[3];
 	u8 saveMSR;
 	u8 saveSR[8];
-	u8 saveGR[24];
+	u8 saveGR[25];
 	u8 saveAR_INDEX;
 	u8 saveAR[20];
 	u8 saveDACMASK;