From: Divya Prakash Date: Mon, 2 Apr 2018 06:45:49 +0000 (+0530) Subject: ASoC: Intel: Skylake: Reset DSP pipe in skl_pcm_hw_free X-Git-Tag: v4.18-rc1~127^2^2~215 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=179c2e86328c3d7e07f87f9c45a216cda626e9ee;p=linux.git ASoC: Intel: Skylake: Reset DSP pipe in skl_pcm_hw_free Currently during destroy pipeline the gateway is disabled before DMA completion. This leads to improper draining of data and subsequently causing issues on HD-Audio DMA. Hence added a new pipe reset IPC in skl_pcm_hw_free in which the Gateway Enable(GEN bit) is reset to 0 after DMA completion in skl_pcm_trigger. Signed-off-by: Divya Prakash Signed-off-by: Sriram Periyasamy Signed-off-by: Mark Brown --- diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c index 15cb8ac3e374..fe25515debec 100644 --- a/sound/soc/intel/skylake/skl-pcm.c +++ b/sound/soc/intel/skylake/skl-pcm.c @@ -366,9 +366,21 @@ static int skl_pcm_hw_free(struct snd_pcm_substream *substream, { struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); struct hdac_ext_stream *stream = get_hdac_ext_stream(substream); + struct skl *skl = get_skl_ctx(dai->dev); + struct skl_module_cfg *mconfig; + int ret; dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name); + mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream); + + if (mconfig) { + ret = skl_reset_pipe(skl->skl_sst, mconfig->pipe); + if (ret < 0) + dev_err(dai->dev, "%s:Reset failed ret =%d", + __func__, ret); + } + snd_hdac_stream_cleanup(hdac_stream(stream)); hdac_stream(stream)->prepared = 0;