From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 21 Feb 2014 14:19:19 +0000 (+1000)
Subject: drm/nvc0/fifo: mask unhandled intr bits when seen, rather than all intrs
X-Git-Tag: v3.15-rc1~51^2~39^2~67
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=22a7a27b18470db9435d5ac7fb1de42bde52061f;p=linux.git

drm/nvc0/fifo: mask unhandled intr bits when seen, rather than all intrs

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
---

diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
index 919980d902d1..5472f01272e9 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
@@ -594,9 +594,9 @@ nvc0_fifo_intr(struct nouveau_subdev *subdev)
 	}
 
 	if (stat) {
-		nv_fatal(priv, "unhandled status 0x%08x\n", stat);
+		nv_error(priv, "INTR 0x%08x\n", stat);
+		nv_mask(priv, 0x002140, stat, 0x00000000);
 		nv_wr32(priv, 0x002100, stat);
-		nv_wr32(priv, 0x002140, 0);
 	}
 }