From: yong mao Date: Wed, 28 Aug 2019 09:45:24 +0000 (+0800) Subject: mmc: mediatek: enable SDIO IRQ low level trigger function X-Git-Tag: v5.4-rc1~147^2~28 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=26c71a13a8f9db0c5f24f5c0ec6a9f7e1da0dd5a;p=linux.git mmc: mediatek: enable SDIO IRQ low level trigger function SDIO IRQ is not defaultly triggered by low level, but by falling edge. It needs to set related register to enable SDIO IRQ low level trigger function. Otherwise the SDIO IRQ may be lost in some specail condition. Signed-off-by: Yong Mao Signed-off-by: Chaotian Jing Signed-off-by: Ulf Hansson --- diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 4c72c5b73e87..6946bb040a28 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -192,6 +192,7 @@ #define SDC_STS_CMDBUSY (0x1 << 1) /* RW */ #define SDC_STS_SWR_COMPL (0x1 << 31) /* RW */ +#define SDC_DAT1_IRQ_TRIGGER (0x1 << 19) /* RW */ /* SDC_ADV_CFG0 mask */ #define SDC_RX_ENHANCE_EN (0x1 << 20) /* RW */ @@ -1577,6 +1578,7 @@ static void msdc_init_hw(struct msdc_host *host) /* Config SDIO device detect interrupt function */ sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); + sdr_set_bits(host->base + SDC_ADV_CFG0, SDC_DAT1_IRQ_TRIGGER); /* Configure to default data timeout */ sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3);