From: Joel Stanley Date: Wed, 4 Oct 2017 06:49:10 +0000 (+1030) Subject: ARM: dts: aspeed: Reorder ADC node X-Git-Tag: v4.15-rc1~75^2~45^2~11 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=29b246400cc0e8c5e0e2f9d0206c53df93b79bea;p=linux.git ARM: dts: aspeed: Reorder ADC node We try to keep the nodes in address order. The ADC node was out of place. Reviewed-by: Andrew Jeffery Signed-off-by: Joel Stanley --- diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 1edd0cee6221..c2d96b8a5065 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -129,6 +129,14 @@ pinctrl: pinctrl { }; }; + adc: adc@1e6e9000 { + compatible = "aspeed,ast2400-adc"; + reg = <0x1e6e9000 0xb0>; + clocks = <&clk_apb>; + #io-channel-cells = <1>; + status = "disabled"; + }; + sram@1e720000 { compatible = "mmio-sram"; reg = <0x1e720000 0x8000>; // 32K @@ -227,14 +235,6 @@ uart6: serial@1e787000 { no-loopback-test; status = "disabled"; }; - - adc: adc@1e6e9000 { - compatible = "aspeed,ast2400-adc"; - reg = <0x1e6e9000 0xb0>; - clocks = <&clk_apb>; - #io-channel-cells = <1>; - status = "disabled"; - }; }; }; }; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index f56dd67efa50..9e71c2dac0ba 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -173,6 +173,14 @@ gfx: display@1e6e6000 { reg-io-width = <4>; }; + adc: adc@1e6e9000 { + compatible = "aspeed,ast2500-adc"; + reg = <0x1e6e9000 0xb0>; + clocks = <&clk_apb>; + #io-channel-cells = <1>; + status = "disabled"; + }; + sram@1e720000 { compatible = "mmio-sram"; reg = <0x1e720000 0x9000>; // 36K @@ -307,14 +315,6 @@ uart6: serial@1e787000 { no-loopback-test; status = "disabled"; }; - - adc: adc@1e6e9000 { - compatible = "aspeed,ast2500-adc"; - reg = <0x1e6e9000 0xb0>; - clocks = <&clk_apb>; - #io-channel-cells = <1>; - status = "disabled"; - }; }; }; };