From: Alexander Shiyan <shc_work@mail.ru>
Date: Mon, 13 May 2013 17:07:23 +0000 (+0400)
Subject: ARM: clps711x: Set PLL clock to zero if we work from 13 mHz source
X-Git-Tag: v3.11-rc1~153^2~40^2~13
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=2a6f06141533fc48dc4077b0b4a9e722c1b72711;p=linux.git

ARM: clps711x: Set PLL clock to zero if we work from 13 mHz source

This clock will be used in audio subsystem. Since audio cannot work
without PLL we should indicate this.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
---

diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index 20ff50f3ccf0..f42302e466bd 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -301,6 +301,7 @@ void __init clps711x_timer_init(void)
 		cpu = ext;
 		bus = cpu;
 		spi = 135400;
+		pll = 0;
 	} else {
 		cpu = pll;
 		if (cpu >= 36864000)