From: Maxime Ripard Date: Mon, 19 Aug 2019 19:25:21 +0000 (+0200) Subject: ASoC: sun4i-i2s: Fix WSS and SR fields for the A83t X-Git-Tag: v5.4-rc1~52^2~1^2~117 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=2e04fc4dbf50195262aa5a2ae6d35baa5b598cae;p=linux.git ASoC: sun4i-i2s: Fix WSS and SR fields for the A83t The A83t has the same bit fields offsets than the A10 and A31, while this was the first device with the new layout, fix that. Fixes: 21faaea1343f ("ASoC: sun4i-i2s: Add support for A83T") Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/d93f0943cc39d880750daf459a0eeab34c63518e.1566242458.git-series.maxime.ripard@bootlin.com Signed-off-by: Mark Brown --- diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c index 29b5eacd3abe..59d809df8d2a 100644 --- a/sound/soc/sunxi/sun4i-i2s.c +++ b/sound/soc/sunxi/sun4i-i2s.c @@ -1048,8 +1048,8 @@ static const struct sun4i_i2s_quirks sun8i_a83t_i2s_quirks = { .reg_offset_txdata = SUN8I_I2S_FIFO_TX_REG, .sun4i_i2s_regmap = &sun4i_i2s_regmap_config, .field_clkdiv_mclk_en = REG_FIELD(SUN4I_I2S_CLK_DIV_REG, 7, 7), - .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 2, 3), - .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5), + .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 2), + .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 6), .bclk_dividers = sun8i_i2s_clk_div, .num_bclk_dividers = ARRAY_SIZE(sun8i_i2s_clk_div), .mclk_dividers = sun8i_i2s_clk_div,