From: Andy Shevchenko Date: Tue, 23 Jul 2019 15:56:26 +0000 (+0300) Subject: pinctrl: broxton: Provide Interrupt Status register offset X-Git-Tag: v5.4-rc1~107^2~8^2~14 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=3818d73612caa5a3651300bf73ab7dc9fdbc03e1;p=linux.git pinctrl: broxton: Provide Interrupt Status register offset Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- diff --git a/drivers/pinctrl/intel/pinctrl-broxton.c b/drivers/pinctrl/intel/pinctrl-broxton.c index e2d4505d6747..2be7e414f803 100644 --- a/drivers/pinctrl/intel/pinctrl-broxton.c +++ b/drivers/pinctrl/intel/pinctrl-broxton.c @@ -15,8 +15,9 @@ #include "pinctrl-intel.h" #define BXT_PAD_OWN 0x020 -#define BXT_HOSTSW_OWN 0x080 #define BXT_PADCFGLOCK 0x060 +#define BXT_HOSTSW_OWN 0x080 +#define BXT_GPI_IS 0x100 #define BXT_GPI_IE 0x110 #define BXT_COMMUNITY(s, e) \ @@ -24,6 +25,7 @@ .padown_offset = BXT_PAD_OWN, \ .padcfglock_offset = BXT_PADCFGLOCK, \ .hostown_offset = BXT_HOSTSW_OWN, \ + .is_offset = BXT_GPI_IS, \ .ie_offset = BXT_GPI_IE, \ .gpp_size = 32, \ .pin_base = (s), \