From: Jerry Zuo Date: Tue, 17 Oct 2017 19:36:13 +0000 (-0400) Subject: drm/amd/display: Fix no display on Fiji X-Git-Tag: v4.15-rc1~56^2~2^2~15 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=3b21b6d239f43c0d797bf0deb8c0f8c846862eb1;p=linux.git drm/amd/display: Fix no display on Fiji Allocate memory for the second pipe allocate_mem_input() needs to be done prior to program pipe front end. It shows sensitive to Fiji. Failure to do so will cause error in allocate memory  allocate_mem_input() on the second connected display. Signed-off-by: Jerry Zuo Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 2a6d3ca12954..399a5984ada3 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c @@ -1370,16 +1370,6 @@ static enum dc_status apply_single_controller_ctx_to_hw( pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; - /* mst support - use total stream count */ - if (pipe_ctx->plane_res.mi != NULL) { - pipe_ctx->plane_res.mi->funcs->allocate_mem_input( - pipe_ctx->plane_res.mi, - stream->timing.h_total, - stream->timing.v_total, - stream->timing.pix_clk_khz, - context->stream_count); - } - pipe_ctx->stream->sink->link->psr_enabled = false; return DC_OK; @@ -2891,6 +2881,15 @@ static void dce110_apply_ctx_for_surface( if (pipe_ctx->stream != stream) continue; + /* Need to allocate mem before program front end for Fiji */ + if (pipe_ctx->plane_res.mi != NULL) + pipe_ctx->plane_res.mi->funcs->allocate_mem_input( + pipe_ctx->plane_res.mi, + pipe_ctx->stream->timing.h_total, + pipe_ctx->stream->timing.v_total, + pipe_ctx->stream->timing.pix_clk_khz, + context->stream_count); + dce110_program_front_end_for_pipe(dc, pipe_ctx); program_surface_visibility(dc, pipe_ctx);