From: Krzysztof Kozlowski Date: Thu, 18 Feb 2016 05:13:02 +0000 (+0900) Subject: ARM: dts: exynos: Add cooling levels for Exynos5422/5800 CPUs X-Git-Tag: v4.6-rc1~74^2~8^2~1 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=3b93fc0f2a1f646745de8738f04fd3568b948197;p=linux.git ARM: dts: exynos: Add cooling levels for Exynos5422/5800 CPUs On Exynos5422 and Exynos5800 we support 12 cpufreq steps (200-1300 MHz) for LITTLE and 18 steps for big core (200-1700 MHz). Add respective cooling cells. Signed-off-by: Krzysztof Kozlowski Acked-by: Viresh Kumar --- diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi index 9b46b9fbac4e..bf3c6f1ec4ee 100644 --- a/arch/arm/boot/dts/exynos5422-cpus.dtsi +++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi @@ -32,6 +32,9 @@ cpu0: cpu@100 { clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; + cooling-min-level = <0>; + cooling-max-level = <11>; + #cooling-cells = <2>; /* min followed by max */ }; cpu1: cpu@101 { @@ -41,6 +44,9 @@ cpu1: cpu@101 { clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; + cooling-min-level = <0>; + cooling-max-level = <11>; + #cooling-cells = <2>; /* min followed by max */ }; cpu2: cpu@102 { @@ -50,6 +56,9 @@ cpu2: cpu@102 { clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; + cooling-min-level = <0>; + cooling-max-level = <11>; + #cooling-cells = <2>; /* min followed by max */ }; cpu3: cpu@103 { @@ -59,6 +68,9 @@ cpu3: cpu@103 { clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; + cooling-min-level = <0>; + cooling-max-level = <11>; + #cooling-cells = <2>; /* min followed by max */ }; cpu4: cpu@0 { @@ -69,6 +81,9 @@ cpu4: cpu@0 { clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; + cooling-min-level = <0>; + cooling-max-level = <15>; + #cooling-cells = <2>; /* min followed by max */ }; cpu5: cpu@1 { @@ -78,6 +93,9 @@ cpu5: cpu@1 { clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; + cooling-min-level = <0>; + cooling-max-level = <15>; + #cooling-cells = <2>; /* min followed by max */ }; cpu6: cpu@2 { @@ -87,6 +105,9 @@ cpu6: cpu@2 { clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; + cooling-min-level = <0>; + cooling-max-level = <15>; + #cooling-cells = <2>; /* min followed by max */ }; cpu7: cpu@3 { @@ -96,6 +117,9 @@ cpu7: cpu@3 { clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; + cooling-min-level = <0>; + cooling-max-level = <15>; + #cooling-cells = <2>; /* min followed by max */ }; }; };