From: Simon Sandström Date: Tue, 5 Dec 2017 22:08:40 +0000 (+0100) Subject: staging: pi433: Capitalize constant definitions X-Git-Tag: v4.16-rc1~112^2~416 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=3d7f3bf241cb01425188f3bb7fb7eb8cebb587b0;p=linux.git staging: pi433: Capitalize constant definitions Fixes checkpatch.pl warnings "Avoid CamelCase ". Signed-off-by: Simon Sandström Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/pi433/pi433_if.c b/drivers/staging/pi433/pi433_if.c index 3404cb9722c9..840a7c7bf19a 100644 --- a/drivers/staging/pi433/pi433_if.c +++ b/drivers/staging/pi433/pi433_if.c @@ -133,20 +133,20 @@ static irqreturn_t DIO0_irq_handler(int irq, void *dev_id) { struct pi433_device *device = dev_id; - if (device->irq_state[DIO0] == DIO_PacketSent) + if (device->irq_state[DIO0] == DIO_PACKET_SENT) { device->free_in_fifo = FIFO_SIZE; dev_dbg(device->dev, "DIO0 irq: Packet sent\n"); wake_up_interruptible(&device->fifo_wait_queue); } - else if (device->irq_state[DIO0] == DIO_Rssi_DIO0) + else if (device->irq_state[DIO0] == DIO_RSSI_DIO0) { dev_dbg(device->dev, "DIO0 irq: RSSI level over threshold\n"); wake_up_interruptible(&device->rx_wait_queue); } - else if (device->irq_state[DIO0] == DIO_PayloadReady) + else if (device->irq_state[DIO0] == DIO_PAYLOAD_READY) { - dev_dbg(device->dev, "DIO0 irq: PayloadReady\n"); + dev_dbg(device->dev, "DIO0 irq: Payload ready\n"); device->free_in_fifo = 0; wake_up_interruptible(&device->fifo_wait_queue); } @@ -158,11 +158,11 @@ static irqreturn_t DIO1_irq_handler(int irq, void *dev_id) { struct pi433_device *device = dev_id; - if (device->irq_state[DIO1] == DIO_FifoNotEmpty_DIO1) + if (device->irq_state[DIO1] == DIO_FIFO_NOT_EMPTY_DIO1) { device->free_in_fifo = FIFO_SIZE; } - else if (device->irq_state[DIO1] == DIO_FifoLevel) + else if (device->irq_state[DIO1] == DIO_FIFO_LEVEL) { if (device->rx_active) device->free_in_fifo = FIFO_THRESHOLD - 1; else device->free_in_fifo = FIFO_SIZE - FIFO_THRESHOLD - 1; @@ -309,14 +309,14 @@ pi433_start_rx(struct pi433_device *dev) if (retval) return retval; /* setup rssi irq */ - SET_CHECKED(rf69_set_dio_mapping(dev->spi, DIO0, DIO_Rssi_DIO0)); - dev->irq_state[DIO0] = DIO_Rssi_DIO0; + SET_CHECKED(rf69_set_dio_mapping(dev->spi, DIO0, DIO_RSSI_DIO0)); + dev->irq_state[DIO0] = DIO_RSSI_DIO0; irq_set_irq_type(dev->irq_num[DIO0], IRQ_TYPE_EDGE_RISING); /* setup fifo level interrupt */ SET_CHECKED(rf69_set_fifo_threshold(dev->spi, FIFO_SIZE - FIFO_THRESHOLD)); - SET_CHECKED(rf69_set_dio_mapping(dev->spi, DIO1, DIO_FifoLevel)); - dev->irq_state[DIO1] = DIO_FifoLevel; + SET_CHECKED(rf69_set_dio_mapping(dev->spi, DIO1, DIO_FIFO_LEVEL)); + dev->irq_state[DIO1] = DIO_FIFO_LEVEL; irq_set_irq_type(dev->irq_num[DIO1], IRQ_TYPE_EDGE_RISING); /* set module to receiving mode */ @@ -378,8 +378,8 @@ pi433_receive(void *data) } /* configure payload ready irq */ - SET_CHECKED(rf69_set_dio_mapping(spi, DIO0, DIO_PayloadReady)); - dev->irq_state[DIO0] = DIO_PayloadReady; + SET_CHECKED(rf69_set_dio_mapping(spi, DIO0, DIO_PAYLOAD_READY)); + dev->irq_state[DIO0] = DIO_PAYLOAD_READY; irq_set_irq_type(dev->irq_num[DIO0], IRQ_TYPE_EDGE_RISING); /* fixed or unlimited length? */ @@ -590,13 +590,13 @@ pi433_tx_thread(void *data) rf69_set_tx_cfg(device, &tx_cfg); /* enable fifo level interrupt */ - SET_CHECKED(rf69_set_dio_mapping(spi, DIO1, DIO_FifoLevel)); - device->irq_state[DIO1] = DIO_FifoLevel; + SET_CHECKED(rf69_set_dio_mapping(spi, DIO1, DIO_FIFO_LEVEL)); + device->irq_state[DIO1] = DIO_FIFO_LEVEL; irq_set_irq_type(device->irq_num[DIO1], IRQ_TYPE_EDGE_FALLING); /* enable packet sent interrupt */ - SET_CHECKED(rf69_set_dio_mapping(spi, DIO0, DIO_PacketSent)); - device->irq_state[DIO0] = DIO_PacketSent; + SET_CHECKED(rf69_set_dio_mapping(spi, DIO0, DIO_PACKET_SENT)); + device->irq_state[DIO0] = DIO_PACKET_SENT; irq_set_irq_type(device->irq_num[DIO0], IRQ_TYPE_EDGE_RISING); enable_irq(device->irq_num[DIO0]); /* was disabled by rx active check */ diff --git a/drivers/staging/pi433/rf69_registers.h b/drivers/staging/pi433/rf69_registers.h index 6335d42142fe..d23b8b668ef5 100644 --- a/drivers/staging/pi433/rf69_registers.h +++ b/drivers/staging/pi433/rf69_registers.h @@ -346,28 +346,28 @@ #define DIO5 5 /* DIO Mapping values (packet mode) */ -#define DIO_ModeReady_DIO4 0x00 -#define DIO_ModeReady_DIO5 0x03 -#define DIO_ClkOut 0x00 -#define DIO_Data 0x01 -#define DIO_TimeOut_DIO1 0x03 -#define DIO_TimeOut_DIO4 0x00 -#define DIO_Rssi_DIO0 0x03 -#define DIO_Rssi_DIO3_4 0x01 -#define DIO_RxReady 0x02 -#define DIO_PLLLock 0x03 -#define DIO_TxReady 0x01 -#define DIO_FifoFull_DIO1 0x01 -#define DIO_FifoFull_DIO3 0x00 -#define DIO_SyncAddress 0x02 -#define DIO_FifoNotEmpty_DIO1 0x02 -#define DIO_FifoNotEmpty_FIO2 0x00 -#define DIO_Automode 0x04 -#define DIO_FifoLevel 0x00 -#define DIO_CrcOk 0x00 -#define DIO_PayloadReady 0x01 -#define DIO_PacketSent 0x00 -#define DIO_Dclk 0x00 +#define DIO_MODE_READY_DIO4 0x00 +#define DIO_MODE_READY_DIO5 0x03 +#define DIO_CLK_OUT 0x00 +#define DIO_DATA 0x01 +#define DIO_TIMEOUT_DIO1 0x03 +#define DIO_TIMEOUT_DIO4 0x00 +#define DIO_RSSI_DIO0 0x03 +#define DIO_RSSI_DIO3_4 0x01 +#define DIO_RX_READY 0x02 +#define DIO_PLL_LOCK 0x03 +#define DIO_TX_READY 0x01 +#define DIO_FIFO_FULL_DIO1 0x01 +#define DIO_FIFO_FULL_DIO3 0x00 +#define DIO_SYNC_ADDRESS 0x02 +#define DIO_FIFO_NOT_EMPTY_DIO1 0x02 +#define DIO_FIFO_NOT_EMPTY_FIO2 0x00 +#define DIO_AUTOMODE 0x04 +#define DIO_FIFO_LEVEL 0x00 +#define DIO_CRC_OK 0x00 +#define DIO_PAYLOAD_READY 0x01 +#define DIO_PACKET_SENT 0x00 +#define DIO_DCLK 0x00 /* RegDioMapping2 CLK_OUT part */ #define MASK_DIOMAPPING2_CLK_OUT 0x07