From: Stephen Boyd <sboyd@kernel.org>
Date: Wed, 16 Oct 2019 21:01:19 +0000 (-0700)
Subject: Merge tag 'clk-meson-fixes-v5.4-1' of https://github.com/BayLibre/clk-meson into... 
X-Git-Tag: v5.4-rc7~26^2~7
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=3d883e896947cceeb0e290dfffe0bc16912c90ae;p=linux.git

Merge tag 'clk-meson-fixes-v5.4-1' of https://github.com/BayLibre/clk-meson into clk-fixes

Pull first round of amlogic clock fixes from Jerome Brunet:

 - This fixes the clock rate propagation for the g12a cpu and gxbb adc clocks.

* tag 'clk-meson-fixes-v5.4-1' of https://github.com/BayLibre/clk-meson:
  clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes
  clk: meson: g12a: fix cpu clock rate setting
  clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate
---

3d883e896947cceeb0e290dfffe0bc16912c90ae