From: Esben Haabendal Date: Wed, 20 Jun 2018 07:34:42 +0000 (+0200) Subject: spi: spi-fsl-dspi: Enable extended SPI mode X-Git-Tag: v4.19-rc5~29^2~31 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=3e7cc6252dc81100bd2803b3148a1e59b3dfae6a;p=linux.git spi: spi-fsl-dspi: Enable extended SPI mode Set the XSPI bit for devices configured for XSPI mode (currently LS1021A), and thereby switch to extended SPI mode, allowing for SPI transfers using from 4 to 32 bits per word instead of 4 to 16 bits per word. Signed-off-by: Esben Haabendal Acked-by: Martin Hundebøll Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index eed55491b2c9..1f85dcdb2203 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -46,6 +46,7 @@ #define SPI_MCR_PCSIS (0x3F << 16) #define SPI_MCR_CLR_TXF (1 << 11) #define SPI_MCR_CLR_RXF (1 << 10) +#define SPI_MCR_XSPI (1 << 3) #define SPI_TCR 0x08 #define SPI_TCR_GET_TCNT(x) (((x) & 0xffff0000) >> 16) @@ -968,7 +969,8 @@ static const struct regmap_config dspi_xspi_regmap_config[] = { static void dspi_init(struct fsl_dspi *dspi) { - regmap_write(dspi->regmap, SPI_MCR, SPI_MCR_MASTER | SPI_MCR_PCSIS); + regmap_write(dspi->regmap, SPI_MCR, SPI_MCR_MASTER | SPI_MCR_PCSIS | + (dspi->devtype_data->xspi_mode ? SPI_MCR_XSPI : 0)); regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR); if (dspi->devtype_data->xspi_mode) regmap_write(dspi->regmap, SPI_CTARE(0),