From: Barry Song <Baohua.Song@csr.com>
Date: Thu, 23 Aug 2012 02:47:53 +0000 (+0800)
Subject: ARM: PRIMA2: rename prima2-cb.dts to prima2.dtsi as it only has SoC features
X-Git-Tag: v3.7-rc1~159^2~20^2~1
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=434e1c574cc304eaff630f4e92ed239f7886815f;p=linux.git

ARM: PRIMA2: rename prima2-cb.dts to prima2.dtsi as it only has SoC features

The current prima2-cb.dts only includes prima2 SoC feature without board-
specific descriptions. This patches rename it to dtsi and clean some useless
content.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
---

diff --git a/arch/arm/boot/dts/prima2-cb.dts b/arch/arm/boot/dts/prima2.dtsi
similarity index 96%
rename from arch/arm/boot/dts/prima2-cb.dts
rename to arch/arm/boot/dts/prima2.dtsi
index 4245306d60e1..1b716aae64f7 100644
--- a/arch/arm/boot/dts/prima2-cb.dts
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -1,20 +1,18 @@
-/dts-v1/;
+/*
+ * DTS file for CSR SiRFprimaII SoC
+ *
+ * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/include/ "skeleton.dtsi"
 / {
-	model = "SiRF Prima2 eVB";
-	compatible = "sirf,prima2-cb", "sirf,prima2";
+	compatible = "sirf,prima2";
 	#address-cells = <1>;
 	#size-cells = <1>;
 	interrupt-parent = <&intc>;
 
-	memory {
-		reg = <0x00000000 0x20000000>;
-	};
-
-	chosen {
-		bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1";
-		linux,stdout-path = &uart1;
-	};
-
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;