From: Gregory CLEMENT Date: Mon, 20 May 2013 14:13:27 +0000 (+0200) Subject: ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node X-Git-Tag: v3.10-rc3~13^2~8^2 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=489e138eec96f529c5e8d4cd3ea45882ecdbf5ca;p=linux.git ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node During the conversion to the internal-regs' subnode, the L2-cache node haven not been converted (due to a wrong choice made by myself during the resolution of the merge conflict when I rebased the commit). This leads to wrong address for L2 cache which prevent it to be used on Armada 370. This commit fix the address reg of the e L2-cache node. Signed-off-by: Gregory CLEMENT Signed-off-by: Jason Cooper --- diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index a1a870364dd8..aee2b1866ce2 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -39,7 +39,7 @@ system-controller@18200 { L2: l2-cache { compatible = "marvell,aurora-outer-cache"; - reg = <0xd0008000 0x1000>; + reg = <0x08000 0x1000>; cache-id-part = <0x100>; wt-override; };