From: Jon Hunter Date: Thu, 16 May 2019 15:53:54 +0000 (+0100) Subject: dmaengine: tegra210-adma: Fix spelling X-Git-Tag: v5.2-rc4~8^2~6 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=492252493ea382d12cb61c52295fc2d088bba28f;p=linux.git dmaengine: tegra210-adma: Fix spelling Correct spelling of 'register' in Tegra210 ADMA driver. Fixes: ded1f3db4cd6 ("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips") Signed-off-by: Jon Hunter Signed-off-by: Vinod Koul --- diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c index 3f50fd11c380..17ea4dd99c62 100644 --- a/drivers/dma/tegra210-adma.c +++ b/drivers/dma/tegra210-adma.c @@ -95,7 +95,7 @@ struct tegra_adma; * @global_int_clear: Register offset of DMA global interrupt clear. * @ch_req_tx_shift: Register offset for AHUB transmit channel select. * @ch_req_rx_shift: Register offset for AHUB receive channel select. - * @ch_base_offset: Reister offset of DMA channel registers. + * @ch_base_offset: Register offset of DMA channel registers. * @ch_fifo_ctrl: Default value for channel FIFO CTRL register. * @ch_req_mask: Mask for Tx or Rx channel select. * @ch_req_max: Maximum number of Tx or Rx channels available.