From: Kenneth Feng Date: Wed, 16 Oct 2019 08:20:38 +0000 (+0800) Subject: drm/amd/powerplay: bug fix for memory clock request from display X-Git-Tag: v5.5-rc1~128^2~25^2~51 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=5441dd0e2caadc6038a8c1ccd16cf3c9cdb62db1;p=linux.git drm/amd/powerplay: bug fix for memory clock request from display In some cases, display fixes memory clock frequency to a high value rather than the natural memory clock switching. When we comes back from s3 resume, the request from display is not reset, this causes the bug which makes the memory clock goes into a low value. Then due to the insuffcient memory clock, the screen flicks. Signed-off-by: Kenneth Feng Reviewed-by: Jack Xiao Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index e2a03f411d6b..ee374df32b19 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -1354,6 +1354,8 @@ static int smu_resume(void *handle) if (smu->is_apu) smu_set_gfx_cgpg(&adev->smu, true); + smu->disable_uclk_switch = 0; + mutex_unlock(&smu->mutex); pr_info("SMU is resumed successfully!\n");