From: Stephane Grosjean Date: Thu, 21 Jun 2018 13:23:30 +0000 (+0200) Subject: can: peak_canfd: rearrange the way resources are released X-Git-Tag: v4.19-rc1~140^2~210^2~13 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=5592cd0390741e6fecfc7908baaeadb4682f3c48;p=linux.git can: peak_canfd: rearrange the way resources are released This patch improves the sequence the resources are released by, first, - disabling the IRQ in the controller, then by - resetting the DMA logic, and finally, by - adding a read cycle to ensure that the above commands have been received before freeing the system interrupt. Signed-off-by: Stephane Grosjean Signed-off-by: Marc Kleine-Budde --- diff --git a/drivers/net/can/peak_canfd/peak_pciefd_main.c b/drivers/net/can/peak_canfd/peak_pciefd_main.c index b09961b1eeef..c458d5fdc8d3 100644 --- a/drivers/net/can/peak_canfd/peak_pciefd_main.c +++ b/drivers/net/can/peak_canfd/peak_pciefd_main.c @@ -488,13 +488,16 @@ static int pciefd_post_cmd(struct peak_canfd_priv *ucan) /* controller now in reset mode: */ + /* disable IRQ for this CAN */ + pciefd_can_writereg(priv, CANFD_CTL_IEN_BIT, + PCIEFD_REG_CAN_RX_CTL_CLR); + /* stop and reset DMA addresses in Tx/Rx engines */ pciefd_can_clear_tx_dma(priv); pciefd_can_clear_rx_dma(priv); - /* disable IRQ for this CAN */ - pciefd_can_writereg(priv, CANFD_CTL_IEN_BIT, - PCIEFD_REG_CAN_RX_CTL_CLR); + /* wait for above commands to complete (read cycle) */ + (void)pciefd_sys_readreg(priv->board, PCIEFD_REG_SYS_VER1); free_irq(priv->ucan.ndev->irq, priv);