From: Ricardo Ribalda Delgado Date: Wed, 28 Jan 2015 12:23:43 +0000 (+0100) Subject: spi/xilinx: Use cached value of register X-Git-Tag: v4.0-rc1~167^2^2~13 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=5b74d7a3b888fd3db6dce77eb11b3d55b64f6833;p=linux.git spi/xilinx: Use cached value of register The control register has not changed since the previous access. Therefore we can use the cached value and safe one bus access. Signed-off-by: Ricardo Ribalda Delgado Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c index a0f7c9d4a349..12b311ed9bfa 100644 --- a/drivers/spi/spi-xilinx.c +++ b/drivers/spi/spi-xilinx.c @@ -271,7 +271,6 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) * transmitter while the Isr refills the transmit register/FIFO, * or make sure it is stopped if we're done. */ - cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET); xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT, xspi->regs + XSPI_CR_OFFSET);