From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sun, 16 Jul 2017 14:11:45 +0000 (+0200)
Subject: ARM64: dts: meson-gx: consistently use the GIC_SPI and IRQ type macros
X-Git-Tag: v4.14-rc4~24^2~1^2~20
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=5e3465f63da80f825a2a8b51af5e28e0cc5e75f7;p=linux.git

ARM64: dts: meson-gx: consistently use the GIC_SPI and IRQ type macros

the mailbox and ethmac nodes used the magic number "0" instead of the
GIC_SPI preprocessor macro. Additionally the ethmac used the magic
number "1" instead of IRQ_TYPE_EDGE_RISING.
Fix this to make the .dtsi easier to read.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
---

diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 35b8c88c3220..492e6a24349a 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -437,9 +437,9 @@ hiubus: hiubus@c883c000 {
 			mailbox: mailbox@404 {
 				compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
 				reg = <0 0x404 0 0x4c>;
-				interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
-					     <0 209 IRQ_TYPE_EDGE_RISING>,
-					     <0 210 IRQ_TYPE_EDGE_RISING>;
+				interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
+					     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
+					     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
 				#mbox-cells = <1>;
 			};
 		};
@@ -448,7 +448,7 @@ ethmac: ethernet@c9410000 {
 			compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
 			reg = <0x0 0xc9410000 0x0 0x10000
 			       0x0 0xc8834540 0x0 0x4>;
-			interrupts = <0 8 1>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
 			interrupt-names = "macirq";
 			status = "disabled";
 		};