From: Philip Rakity <prakity@marvell.com>
Date: Mon, 11 Jul 2011 21:47:54 +0000 (-0700)
Subject: mmc: sdhci: pxav3: controller needs 32 bit ADMA addressing
X-Git-Tag: v3.1-rc2~2^2~15
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=606a15e475880157dd2336f2dc220eacc9eaf36b;p=linux.git

mmc: sdhci: pxav3: controller needs 32 bit ADMA addressing

Enable the quirk.

(Best used in conjunction with patch downgrading ADMA to SDMA when
transfer is not aligned.)

Signed-off-by: Philip Rakity <prakity@marvell.com>
Acked-by: Zhangfei Gao <zhangfei.gao@marvell.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
---

diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index 4198dbbc5c20..fc7e4a515629 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -195,7 +195,8 @@ static int __devinit sdhci_pxav3_probe(struct platform_device *pdev)
 	clk_enable(clk);
 
 	host->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
-		| SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
+		| SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
+		| SDHCI_QUIRK_32BIT_ADMA_SIZE;
 
 	/* enable 1/8V DDR capable */
 	host->mmc->caps |= MMC_CAP_1_8V_DDR;