From: Alexey Brodkin <abrodkin@synopsys.com>
Date: Mon, 7 Dec 2015 11:21:37 +0000 (+0300)
Subject: ARC: [axs10x] cap ethernet phy to 100 Mbit/sec
X-Git-Tag: v4.4-rc6~19^2~9
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=6d1a2adef782d26113d4f18a617ccb33c4774d54;p=linux.git

ARC: [axs10x] cap ethernet phy to 100 Mbit/sec

Current ARC SDP boards cannot reliably handle 1Gbit
Ethernet connections due to limitations in hardware.

To make sure networking is stable on the board we're
limiting phy to 100 Mbit.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---

diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index f3db32154973..44a578c10732 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -46,6 +46,7 @@ ethernet@0x18000 {
 			snps,pbl = < 32 >;
 			clocks = <&apbclk>;
 			clock-names = "stmmaceth";
+			max-speed = <100>;
 		};
 
 		ehci@0x40000 {