From: H Hartley Sweeten Date: Sun, 3 Sep 2017 17:43:44 +0000 (-0700) Subject: ARM: ep93xx: switch to SPARSEMEM X-Git-Tag: v4.15-rc1~76^2~36^2~3 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=80320927723ff6466b054eccdb673105179c036d;p=linux.git ARM: ep93xx: switch to SPARSEMEM The EP93xx has four chip selects that can be used for the SDRAM memory. These chip selects are decoded to specify an address domain: SDCS3 0x00000000-0x0fffffff with Boot Option ASDO=1 SDCS0 0xc0000000-0xcfffffff SDCS1 0xd0000000-0xdfffffff SDCS2 0xe0000000-x0efffffff SDCS3 0xf0000000-0xffffffff with Boot Option ASDO=0 Because of the row/column/bank architecture of SDRAM, the mapping of these memories into the processor's memory space is discontiguous. Most ep93xx systems only use one of the chip selects. For these systems, ARCH_HAS_HOLES_MEMORYMODEL has worked fine to handle the discontiguous memory. But, some of the TS-72xx boards use multiple chip selects. The TS-7300 in particular uses SDCS3 (with ASDO=1) and SDCS2. On that system with ARCH_HAS_HOLES_MEMORYMODEL the SDCS2 memory does not get handled correctly and results in the system not booting. Change the EP93xx to ARCH_SPARSEMEM_ENABLE. This handles the discontiguous memory for all configurations. This has been tested on the following ep93xx platforms: EDB9307A with 64 MiB on SDCS0 Vision EP9307 with 64 MiB on SDCS0 TS-7300 with 64 MiB on SDCS3 (with ASDO=1) and 64 MiB on SDCS2 sim.one with 64 MiB on SDCS0 Signed-off-by: H Hartley Sweeten Tested-by: Linus Walleij Cc: Russell King Tested-by: Florian Fainelli Tested-by: Alexander Sverdlin Signed-off-by: Linus Walleij --- diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7888c9803eb0..19af0885466e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -378,7 +378,7 @@ config ARCH_EBSA110 config ARCH_EP93XX bool "EP93xx-based" - select ARCH_HAS_HOLES_MEMORYMODEL + select ARCH_SPARSEMEM_ENABLE select ARM_AMBA imply ARM_PATCH_PHYS_VIRT select ARM_VIC