From: Icenowy Zheng <icenowy@aosc.xyz>
Date: Sat, 25 Mar 2017 14:50:10 +0000 (+0800)
Subject: phy: sun4i-usb: add PHYCTL offset for H3 SoC
X-Git-Tag: v4.12-rc1~97^2~26^2~27
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=864ebdf0bd4166e64c21e95b72d770eaa33122aa;p=linux.git

phy: sun4i-usb: add PHYCTL offset for H3 SoC

The config structure of H3 in phy-sun4i-usb driver have the PHYCTL
register offset missing.

Add it. From the BSP source code, we know that the offset should be
0x10.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---

diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c
index 62b4d25448c6..a650f283f6ff 100644
--- a/drivers/phy/phy-sun4i-usb.c
+++ b/drivers/phy/phy-sun4i-usb.c
@@ -821,6 +821,7 @@ static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
 	.num_phys = 4,
 	.type = sun8i_h3_phy,
 	.disc_thresh = 3,
+	.phyctl_offset = REG_PHYCTL_A33,
 	.dedicated_clocks = true,
 	.enable_pmu_unk1 = true,
 };