From: Saeed Mahameed Date: Wed, 1 May 2019 03:21:05 +0000 (+0000) Subject: net/mlx5: Fix broken hca cap offset X-Git-Tag: v5.2-rc1~133^2~50^2~15^2 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=91a40a48d52d13fbde3239d5839335cabd9a4eae;p=linux.git net/mlx5: Fix broken hca cap offset The cited commit broke the offsets of hca cap struct, fix it. While at it, cleanup a white space introduced by the same commit. Fixes: b169e64a2444 ("net/mlx5: Geneve, Add flow table capabilities for Geneve decap with TLV options") Reported-by: Qian Cai Cc: Yevgeny Kliteynik Signed-off-by: Saeed Mahameed --- diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 6a7fc18a9fe3..6b2e6b710ac0 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -1265,7 +1265,7 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 max_geneve_tlv_option_data_len[0x5]; u8 reserved_at_570[0x10]; - u8 reserved_at_580[0x1c]; + u8 reserved_at_580[0x3c]; u8 mini_cqe_resp_stride_index[0x1]; u8 cqe_128_always[0x1]; u8 cqe_compression_128[0x1]; @@ -9566,7 +9566,7 @@ struct mlx5_ifc_sw_icm_bits { u8 sw_icm_start_addr[0x40]; u8 reserved_at_c0[0x140]; -}; +}; struct mlx5_ifc_geneve_tlv_option_bits { u8 modify_field_select[0x40];