From: Lendacky, Thomas Date: Wed, 2 Jul 2014 18:04:34 +0000 (-0500) Subject: amd-xgbe: Clear the proper MTL interrupt register X-Git-Tag: v3.17-rc1~106^2~216^2~3 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=91f873453b70fe6cdb83409bee68e1023204c381;p=linux.git amd-xgbe: Clear the proper MTL interrupt register When initializing the MTL interrupts the interrupt status register is written to instead of the interrupt enable register. Since no MTL interrupts are being enabled and the default state is for MTL interrupts to be disabled this did not cause a problem, but needs to be fixed to target the correct register. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller --- diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c index a56069c91fc4..e9fed23b2c33 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c @@ -486,7 +486,7 @@ static void xgbe_enable_mtl_interrupts(struct xgbe_prv_data *pdata) XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_ISR, mtl_q_isr); /* No MTL interrupts to be enabled */ - XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_ISR, 0); + XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_IER, 0); } }