From: Marek Szyprowski Date: Fri, 29 Sep 2017 12:33:25 +0000 (+0200) Subject: ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi X-Git-Tag: v4.15-rc1~75^2~40^2~3 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=a798f2f02f4ca148e4c1798dad8bde9951e1de0c;p=linux.git ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi Audio subsystem clocks configuration is a part of audio block, so there it should be moved to exynos5422-odroidxu3-audio.dtsi to avoid it on Odroid XU4, which has no audio codec. Signed-off-by: Marek Szyprowski Reviewed-by: Sylwester Nawrocki Signed-off-by: Krzysztof Kozlowski --- diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi index c0b85981c6bf..da3141a307d5 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi @@ -11,6 +11,8 @@ * published by the Free Software Foundation. */ +#include + / { sound: sound { compatible = "simple-audio-card"; @@ -43,6 +45,17 @@ link0_codec: simple-audio-card,codec { }; }; +&clock_audss { + assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_MOUT_I2S>, + <&clock_audss EXYNOS_DOUT_AUD_BUS>; + assigned-clock-parents = <&clock CLK_FIN_PLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>; + assigned-clock-rates = <0>, + <0>, + <19200000>; +}; + &hsi2c_5 { status = "okay"; max98090: max98090@10 { diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 305c2a2b728c..4478a089353a 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -16,7 +16,6 @@ #include #include #include -#include #include "exynos5800.dtsi" #include "exynos5422-cpus.dtsi" @@ -455,17 +454,6 @@ &bus_mscl { status = "okay"; }; -&clock_audss { - assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, - <&clock_audss EXYNOS_MOUT_I2S>, - <&clock_audss EXYNOS_DOUT_AUD_BUS>; - assigned-clock-parents = <&clock CLK_FIN_PLL>, - <&clock_audss EXYNOS_MOUT_AUDSS>; - assigned-clock-rates = <0>, - <0>, - <19200000>; -}; - &cpu0 { cpu-supply = <&buck6_reg>; };