From: Miquel Raynal <miquel.raynal@bootlin.com>
Date: Wed, 3 Oct 2018 07:25:15 +0000 (+0200)
Subject: arm64: dts: marvell: add CP110 ICU SEI subnode
X-Git-Tag: v4.20-rc1~66^2~5^2~1
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=b0e11e58c5cde29f904f60b2a973ba0314233979;p=linux.git

arm64: dts: marvell: add CP110 ICU SEI subnode

The ICU handles several interrupt groups, each of them being a subpart
of the ICU node.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
index b1e688e0ce22..b9d9f31e3ba1 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
@@ -193,6 +193,14 @@ CP110_LABEL(icu_nsr): interrupt-controller@10 {
 				interrupt-controller;
 				msi-parent = <&gicp>;
 			};
+
+			CP110_LABEL(icu_sei): interrupt-controller@50 {
+				compatible = "marvell,cp110-icu-sei";
+				reg = <0x50 0x10>;
+				#interrupt-cells = <2>;
+				interrupt-controller;
+				msi-parent = <&sei>;
+			};
 		};
 
 		CP110_LABEL(rtc): rtc@284000 {