From: Valentine Sinitsyn Date: Fri, 15 Sep 2017 01:34:20 +0000 (-0700) Subject: staging: rtl8188eu: Fix spelling X-Git-Tag: v4.15-rc1~142^2~289 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=b677f4ecf6ac46ac810b663f40ee78a5adef8f6a;p=linux.git staging: rtl8188eu: Fix spelling rtl8188eu contains some spelling errors in comment lines as well as in constants. Harmless as they are, they still make the code feel a bit unclean, which is not something we want in the kernel. Improve this by fixing typos so they won't catch eyes of future driver developers anymore. Signed-off-by: Wolfgang Hartmann Signed-off-by: Manish Shrestha Signed-off-by: Valentine Sinitsyn Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/rtl8188eu/core/rtw_efuse.c b/drivers/staging/rtl8188eu/core/rtw_efuse.c index b9bdff0490ca..2c4c8c43b1ad 100644 --- a/drivers/staging/rtl8188eu/core/rtw_efuse.c +++ b/drivers/staging/rtl8188eu/core/rtw_efuse.c @@ -48,7 +48,7 @@ void Efuse_PowerSwitch( if (PwrState) { usb_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); - /* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */ + /* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), default valid */ tmpV16 = usb_read16(pAdapter, REG_SYS_ISO_CTRL); if (!(tmpV16 & PWC_EV12V)) { tmpV16 |= PWC_EV12V; diff --git a/drivers/staging/rtl8188eu/core/rtw_mlme.c b/drivers/staging/rtl8188eu/core/rtw_mlme.c index b9ac9c8a6648..b15cf17f77c5 100644 --- a/drivers/staging/rtl8188eu/core/rtw_mlme.c +++ b/drivers/staging/rtl8188eu/core/rtw_mlme.c @@ -1329,7 +1329,7 @@ void rtw_cpwm_event_callback(struct adapter *padapter, u8 *pbuf) } /* - * _rtw_join_timeout_handler - Timeout/faliure handler for CMD JoinBss + * _rtw_join_timeout_handler - Timeout/failure handler for CMD JoinBss * @adapter: pointer to struct adapter structure */ void _rtw_join_timeout_handler (unsigned long data) diff --git a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c b/drivers/staging/rtl8188eu/hal/odm_HWConfig.c index 0555e42a3787..5fcbe5639e99 100644 --- a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c +++ b/drivers/staging/rtl8188eu/hal/odm_HWConfig.c @@ -109,7 +109,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++; /* (1)Hardware does not provide RSSI for CCK */ - /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */ + /* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */ cck_highpwr = dm_odm->bCckHighPower; @@ -223,7 +223,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2); dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2); } - /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */ + /* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */ rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110; PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); diff --git a/drivers/staging/rtl8188eu/include/odm.h b/drivers/staging/rtl8188eu/include/odm.h index 4fb3bb07ceaa..50e2673edbf7 100644 --- a/drivers/staging/rtl8188eu/include/odm.h +++ b/drivers/staging/rtl8188eu/include/odm.h @@ -478,7 +478,7 @@ enum odm_operation_mode { /* ODM_CMNINFO_WM_MODE */ enum odm_wireless_mode { - ODM_WM_UNKNOW = 0x0, + ODM_WM_UNKNOWN = 0x0, ODM_WM_B = BIT(0), ODM_WM_G = BIT(1), ODM_WM_A = BIT(2), diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_spec.h b/drivers/staging/rtl8188eu/include/rtl8188e_spec.h index c93e19d1c50f..c33d312c4069 100644 --- a/drivers/staging/rtl8188eu/include/rtl8188e_spec.h +++ b/drivers/staging/rtl8188eu/include/rtl8188e_spec.h @@ -15,7 +15,7 @@ #ifndef __RTL8188E_SPEC_H__ #define __RTL8188E_SPEC_H__ -/* 8192C Regsiter offset definition */ +/* 8192C Register offset definition */ #define HAL_PS_TIMER_INT_DELAY 50 /* 50 microseconds */ #define HAL_92C_NAV_UPPER_UNIT 128 /* micro-second */ @@ -701,7 +701,7 @@ Current IOREG MAP #define REG_USB_HRPWM 0xFE58 #define REG_USB_HCPWM 0xFE57 -/* 8192C Regsiter Bit and Content definition */ +/* 8192C Register Bit and Content definition */ /* 0x0000h ~ 0x00FFh System Configuration */ /* 2 SYS_ISO_CTRL */