From: Patrice Chotard <patrice.chotard@st.com>
Date: Fri, 6 Jan 2017 13:30:21 +0000 (+0100)
Subject: ARM: dts: STiH410-family: fix wrong parent clock frequency
X-Git-Tag: v4.11-rc1~87^2~37^2~6
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=b9ec866d223f38eb0bf2a7c836e10031ee17f7af;p=linux.git

ARM: dts: STiH410-family: fix wrong parent clock frequency

The clock parent was lower than child clock which is not correct.
In some use case, it leads to division by zero.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
---

diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index 8be99d010fb3..3c9672c5b09f 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -131,7 +131,7 @@ sti-display-subsystem {
 						 <&clk_s_d2_quadfs 0>;
 
 			assigned-clock-rates = <297000000>,
-					       <108000000>,
+					       <297000000>,
 					       <0>,
 					       <400000000>,
 					       <400000000>;