From: Nishanth Menon Date: Mon, 29 Aug 2011 13:11:08 +0000 (+0530) Subject: gpio/omap: enable irq at the end of all configuration in restore X-Git-Tag: v3.4-rc1~65^2~24^2~2 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=ba805be53cb9112917631d368f859af5e20d695f;p=linux.git gpio/omap: enable irq at the end of all configuration in restore Setup the interrupt enable registers only after we have configured the required edge and required configurations, not before, to prevent spurious events as part of restore routine. Signed-off-by: Nishanth Menon Signed-off-by: Tarun Kanti DebBarma Reviewed-by: Santosh Shilimkar Reviewed-by: Kevin Hilman Signed-off-by: Kevin Hilman --- diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index f6b2c51b2935..41265e823b23 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -1352,10 +1352,6 @@ void omap2_gpio_resume_after_idle(void) #if defined(CONFIG_PM_RUNTIME) static void omap_gpio_restore_context(struct gpio_bank *bank) { - __raw_writel(bank->context.irqenable1, - bank->base + bank->regs->irqenable); - __raw_writel(bank->context.irqenable2, - bank->base + bank->regs->irqenable2); __raw_writel(bank->context.wake_en, bank->base + bank->regs->wkup_en); __raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl); @@ -1375,6 +1371,11 @@ static void omap_gpio_restore_context(struct gpio_bank *bank) __raw_writel(bank->context.debounce_en, bank->base + bank->regs->debounce_en); } + + __raw_writel(bank->context.irqenable1, + bank->base + bank->regs->irqenable); + __raw_writel(bank->context.irqenable2, + bank->base + bank->regs->irqenable2); } #endif /* CONFIG_PM_RUNTIME */ #else