From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 20 Oct 2016 11:42:55 +0000 (+0200)
Subject: ARM64: dts: meson-gxbb: Add Wifi 32K clock for p20x boards
X-Git-Tag: v4.10-rc1~81^2~14^2~17
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=caafa69d364f922428240dd9e30ae6ae303abc97;p=linux.git

ARM64: dts: meson-gxbb: Add Wifi 32K clock for p20x boards

Add a 32768Hz clock generated by the PWM E port used by the WiFi module.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
---

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
index 86e740fb5969..6861b0af6573 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
@@ -111,6 +111,13 @@ emmc_pwrseq: emmc-pwrseq {
 		compatible = "mmc-pwrseq-emmc";
 		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
 	};
+
+	wifi32k: wifi32k {
+		compatible = "pwm-clock";
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
+	};
 };
 
 /* This UART is brought out to the DB9 connector */
@@ -205,3 +212,11 @@ &sd_emmc_c {
 	vmmc-supply = <&vcc_3v3>;
 	vqmmc-supply = <&vddio_boot>;
 };
+
+&pwm_ef {
+	status = "okay";
+	pinctrl-0 = <&pwm_e_pins>;
+	pinctrl-names = "default";
+	clocks = <&clkc CLKID_FCLK_DIV4>;
+	clock-names = "clkin0";
+};